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359 lines
8.4 KiB
359 lines
8.4 KiB
8 months ago
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
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* (http://www.friendlyelec.com)
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*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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#define HAS_PWM_BACKLIGHT 1
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&pwm_backlight {
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brightness-levels = <
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0 20 20 21 21 22 22 23
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23 24 24 25 25 26 26 27
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27 28 28 29 29 30 30 31
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31 32 32 33 33 34 34 35
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35 36 36 37 37 38 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255
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>;
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default-brightness-level = <200>;
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};
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#if defined(ENABLE_MIPI_DSI0)
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&dsi0 {
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dsi0_panel: panel@0 {
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compatible = "simple-panel-dsi";
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reg = <0>;
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backlight = <&pwm_backlight>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_rst0_gpio>;
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reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
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panel-name = "yx35,210dpi";
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nvmems = <&dsi0_i2c 0x50 0xe0 0x10>;
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nvmem-status = <1>;
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reset-delay-ms = <20>;
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init-delay-ms = <120>;
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enable-delay-ms = <5>;
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prepare-delay-ms = <0>;
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unprepare-delay-ms = <10>;
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disable-delay-ms = <5>;
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width-mm = <45>;
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height-mm = <75>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <2>;
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panel-init-sequence = [
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15 0A 02 01 00
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15 7D 02 11 00
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39 00 06 FF 77 01 00 00 13
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15 00 02 EF 08
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39 00 06 FF 77 01 00 00 10
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39 00 03 C0 63 00
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39 00 03 C1 14 14
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39 00 03 C2 37 02
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15 00 02 CC 10
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39 00 11 B0 C5 11 1B 0D 11 07 0A 09 08 24 05 12 10 A9 32 DF
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39 00 11 B1 C5 19 21 0B 0E 03 0C 07 07 26 04 12 11 AA 32 DF
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39 00 06 FF 77 01 00 00 11
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15 00 02 B0 4D
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15 00 02 B1 59
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15 00 02 B2 81
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15 00 02 B3 80
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15 00 02 B5 4E
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15 00 02 B7 85
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15 00 02 B8 32
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15 00 02 BB 03
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15 00 02 C1 08
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15 00 02 C2 08
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15 00 02 D0 88
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39 00 04 E0 00 00 02
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39 00 0C E1 06 28 08 28 05 28 07 28 0E 33 33
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39 00 0D E2 30 30 33 33 34 00 00 00 34 00 00 00
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39 00 05 E3 00 00 33 33
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39 00 03 E4 44 44
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39 00 11 E5 09 2F 2C 8C 0B 31 2C 8C 0D 33 2C 8C 0F 35 2C 8C
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39 00 05 E6 00 00 33 33
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39 00 03 E7 44 44
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39 00 11 E8 08 2E 2C 8C 0A 30 2C 8C 0C 32 2C 8C 0E 34 2C 8C
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39 00 03 E9 36 00
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39 00 08 EB 00 01 E4 E4 44 88 40
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39 00 11 ED FF FC B2 45 67 FA 01 FF FF 10 AF 76 54 2B CF FF
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39 00 07 EF 08 08 08 45 3F 54
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39 00 06 FF 77 01 00 00 13
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39 00 03 E8 00 0E
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15 78 02 11 00
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39 0A 03 E8 00 0C
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39 00 03 E8 00 00
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39 00 06 FF 77 01 00 00 00
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15 00 02 36 00
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15 00 02 29 00
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];
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panel-exit-sequence = [
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15 00 02 28 00
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15 3C 02 10 00
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];
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disp_timings0: display-timings {
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native-mode = <&dsi_timing0>;
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dsi_timing0: timing0 {
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clock-frequency = <29700000>;
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hactive = <480>;
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vactive = <800>;
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hfront-porch = <40>;
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hsync-len = <32>;
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hback-porch = <30>;
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vfront-porch = <20>;
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vsync-len = <10>;
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vback-porch = <20>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi0: endpoint {
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remote-endpoint = <&dsi0_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi0_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi0>;
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};
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};
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};
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};
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&dsi0_i2c {
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dsi0_gt1x: gt1x@14 {
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compatible = "goodix,gt1x";
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reg = <0x14>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_dsi0_gpio>;
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goodix,irq-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_LOW>;
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goodix,rst-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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keep-otp-config;
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status = "disabled";
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};
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dsi0_gt9xx: gt9xx@5d {
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compatible = "goodix,gt9xx";
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reg = <0x5d>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_dsi0_gpio>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PC0 IRQ_TYPE_EDGE_FALLING>;
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goodix,irq-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_LOW>;
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goodix,rst-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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keep-otp-config;
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status = "disabled";
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};
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};
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#endif
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#if defined(ENABLE_MIPI_DSI1)
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&dsi1 {
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dsi1_panel: panel@0 {
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compatible = "simple-panel-dsi";
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reg = <0>;
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backlight = <&pwm_backlight>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_rst1_gpio>;
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reset-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
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panel-name = "yx35,210dpi";
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nvmems = <&dsi1_i2c 0x50 0xe0 0x10>;
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nvmem-status = <1>;
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reset-delay-ms = <20>;
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init-delay-ms = <120>;
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enable-delay-ms = <5>;
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prepare-delay-ms = <0>;
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unprepare-delay-ms = <10>;
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disable-delay-ms = <5>;
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width-mm = <45>;
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height-mm = <75>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <2>;
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panel-init-sequence = [
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15 0A 02 01 00
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15 7D 02 11 00
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39 00 06 FF 77 01 00 00 13
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15 00 02 EF 08
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39 00 06 FF 77 01 00 00 10
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39 00 03 C0 63 00
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39 00 03 C1 14 14
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39 00 03 C2 37 02
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15 00 02 CC 10
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39 00 11 B0 C5 11 1B 0D 11 07 0A 09 08 24 05 12 10 A9 32 DF
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39 00 11 B1 C5 19 21 0B 0E 03 0C 07 07 26 04 12 11 AA 32 DF
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39 00 06 FF 77 01 00 00 11
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15 00 02 B0 4D
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15 00 02 B1 59
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15 00 02 B2 81
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15 00 02 B3 80
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15 00 02 B5 4E
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15 00 02 B7 85
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15 00 02 B8 32
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15 00 02 BB 03
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15 00 02 C1 08
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15 00 02 C2 08
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15 00 02 D0 88
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39 00 04 E0 00 00 02
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39 00 0C E1 06 28 08 28 05 28 07 28 0E 33 33
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39 00 0D E2 30 30 33 33 34 00 00 00 34 00 00 00
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39 00 05 E3 00 00 33 33
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39 00 03 E4 44 44
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39 00 11 E5 09 2F 2C 8C 0B 31 2C 8C 0D 33 2C 8C 0F 35 2C 8C
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39 00 05 E6 00 00 33 33
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39 00 03 E7 44 44
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39 00 11 E8 08 2E 2C 8C 0A 30 2C 8C 0C 32 2C 8C 0E 34 2C 8C
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39 00 03 E9 36 00
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39 00 08 EB 00 01 E4 E4 44 88 40
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39 00 11 ED FF FC B2 45 67 FA 01 FF FF 10 AF 76 54 2B CF FF
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39 00 07 EF 08 08 08 45 3F 54
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39 00 06 FF 77 01 00 00 13
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39 00 03 E8 00 0E
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15 78 02 11 00
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39 0A 03 E8 00 0C
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39 00 03 E8 00 00
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39 00 06 FF 77 01 00 00 00
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15 00 02 36 00
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15 00 02 29 00
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];
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panel-exit-sequence = [
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15 00 02 28 00
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15 3C 02 10 00
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];
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display-timings {
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native-mode = <&dsi1_timing0>;
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dsi1_timing0: timing0 {
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clock-frequency = <29700000>;
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hactive = <480>;
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vactive = <800>;
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hfront-porch = <40>;
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hsync-len = <32>;
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hback-porch = <30>;
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vfront-porch = <20>;
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vsync-len = <10>;
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vback-porch = <20>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi1: endpoint {
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remote-endpoint = <&dsi1_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi1_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi1>;
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};
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};
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};
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};
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&dsi1_i2c {
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dsi1_gt1x: gt1x@14 {
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compatible = "goodix,gt1x";
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reg = <0x14>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_dsi1_gpio>;
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goodix,irq-gpio = <&gpio4 RK_PA0 IRQ_TYPE_EDGE_FALLING>;
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goodix,rst-gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
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keep-otp-config;
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status = "disabled";
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};
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dsi1_gt9xx: gt9xx@5d {
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compatible = "goodix,gt9xx";
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reg = <0x5d>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_dsi1_gpio>;
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interrupt-parent = <&gpio4>;
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interrupts = <RK_PA0 IRQ_TYPE_EDGE_FALLING>;
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goodix,irq-gpio = <&gpio4 RK_PA0 IRQ_TYPE_EDGE_FALLING>;
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goodix,rst-gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
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keep-otp-config;
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status = "disabled";
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};
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dsi1_e2prom: eeprom@50 {
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compatible = "microchip,24c02", "atmel,24c02";
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reg = <0x50>;
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#address-cells = <2>;
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#size-cells = <0>;
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pagesize = <16>;
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size = <256>;
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};
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};
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#endif
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