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961 lines
19 KiB
961 lines
19 KiB
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
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* (http://www.friendlyarm.com)
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*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include <dt-bindings/display/rockchip_vop.h>
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#include <dt-bindings/sensor-dev.h>
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/ {
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model = "FriendlyElec boards based on Rockchip RK3568";
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compatible = "friendlyelec,nanopi5",
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"rockchip,rk3568";
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chosen: chosen {
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bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 coherent_pool=1m";
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};
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aliases {
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mmc0 = &sdmmc0;
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mmc1 = &sdmmc1;
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mmc2 = &sdhci;
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mmc3 = &sdmmc2;
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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firmware {
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optee: optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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debug: debug@fd904000 {
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compatible = "rockchip,debug";
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reg = <0x0 0xfd904000 0x0 0x1000>,
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<0x0 0xfd905000 0x0 0x1000>,
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<0x0 0xfd906000 0x0 0x1000>,
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<0x0 0xfd907000 0x0 0x1000>;
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};
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cspmu: cspmu@fd90c000 {
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compatible = "rockchip,cspmu";
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reg = <0x0 0xfd90c000 0x0 0x1000>,
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<0x0 0xfd90d000 0x0 0x1000>,
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<0x0 0xfd90e000 0x0 0x1000>,
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<0x0 0xfd90f000 0x0 0x1000>;
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};
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gpio_keys: gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&key1_pin>;
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button@1 {
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debounce-interval = <50>;
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gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
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label = "K1";
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linux,code = <BTN_1>;
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wakeup-source;
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};
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};
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hdmi_sound: hdmi-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <128>;
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simple-audio-card,name = "rockchip,hdmi";
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status = "disabled";
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simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&hdmi>;
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};
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};
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mach: board {
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compatible = "friendlyelec,board";
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machine = "NANOPI5";
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hwrev = <255>;
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model = "NanoPi 5 Series";
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nvmem-cells = <&otp_id>, <&otp_cpu_version>;
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nvmem-cell-names = "id", "cpu-version";
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};
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pdmics: dummy-codec {
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status = "disabled";
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compatible = "rockchip,dummy-codec";
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#sound-dai-cells = <0>;
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};
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pdm_mic_array: pdm-mic-array {
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status = "disabled";
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compatible = "simple-audio-card";
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simple-audio-card,name = "rockchip,pdm-mic-array";
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simple-audio-card,cpu {
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sound-dai = <&pdm>;
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};
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simple-audio-card,codec {
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sound-dai = <&pdmics>;
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};
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};
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rk809_sound: rk809-sound {
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status = "okay";
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,rk809-codec";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s1_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&rk809_codec 0>;
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};
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};
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spdif-sound {
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status = "disabled";
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compatible = "simple-audio-card";
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simple-audio-card,name = "ROCKCHIP,SPDIF";
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simple-audio-card,mclk-fs = <128>;
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simple-audio-card,cpu {
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sound-dai = <&spdif_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&spdif_out>;
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};
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};
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spdif_out: spdif-out {
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status = "disabled";
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compatible = "linux,spdif-dit";
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#sound-dai-cells = <0>;
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};
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vad_sound: vad-sound {
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status = "disabled";
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compatible = "rockchip,multicodecs-card";
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rockchip,card-name = "rockchip,rk3568-vad";
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rockchip,cpu = <&i2s1_8ch>;
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rockchip,codec = <&rk809_codec>, <&vad>;
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};
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vdd_usbc: vdd-usbc {
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compatible = "regulator-fixed";
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regulator-name = "vdd_usbc";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vdd_usbc>;
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};
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vcc3v3_sysp: vcc3v3-sysp {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sysp";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vdd_usbc>;
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};
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vcc5v0_sysp: vcc5v0-sysp {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sysp";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc3v3_sysp>;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_host";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sysp>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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};
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vcc5v0_otg: vcc5v0-otg-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_otg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sysp>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_otg_en>;
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};
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test-power {
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status = "okay";
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};
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};
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&bus_npu {
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bus-supply = <&vdd_logic>;
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pvtm-supply = <&vdd_cpu>;
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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&dfi {
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status = "okay";
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};
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&dmc {
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center-supply = <&vdd_logic>;
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status = "okay";
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};
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/* video_phy0/1 needs to be enabled when dsi0/1 is enabled */
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&dsi0 {
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status = "disabled";
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};
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&dsi1 {
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status = "disabled";
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&hdmi {
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status = "okay";
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rockchip,phy-table =
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<92812500 0x8009 0x0000 0x0270>,
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<165000000 0x800b 0x0000 0x026d>,
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<185625000 0x800b 0x0000 0x01ed>,
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<297000000 0x800b 0x0000 0x01ad>,
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<594000000 0x8029 0x0000 0x0088>,
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<000000000 0x0000 0x0000 0x0000>;
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};
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&hdmi_in_vp0 {
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status = "okay";
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};
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&hdmi_in_vp1 {
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status = "disabled";
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};
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&hdmi_sound {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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i2c-scl-rising-time-ns = <160>;
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i2c-scl-falling-time-ns = <30>;
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clock-frequency = <400000>;
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vdd_cpu: tcs4525@1c {
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compatible = "tcs,tcs4525";
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reg = <0x1c>;
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vin-supply = <&vcc3v3_sys>;
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regulator-compatible = "fan53555-reg";
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regulator-name = "vdd_cpu";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1390000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <2300>;
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fcs,suspend-voltage-selector = <1>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default", "pmic-sleep",
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"pmic-power-off", "pmic-reset";
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pinctrl-0 = <&pmic_int>;
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pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
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pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
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pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
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rockchip,system-power-controller;
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wakeup-source;
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#clock-cells = <1>;
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clock-output-names = "rk808-clkout1", "rk808-clkout2";
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//fb-inner-reg-idxs = <2>;
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/* 1: rst regs (default in codes), 0: rst the pmic */
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pmic-reset-func = <0>;
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/* not save the PMIC_POWER_EN register in uboot */
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not-save-power-en = <1>;
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc5-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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pwrkey {
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status = "okay";
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};
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pinctrl_rk8xx: pinctrl_rk8xx {
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gpio-controller;
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#gpio-cells = <2>;
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rk817_slppin_null: rk817_slppin_null {
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pins = "gpio_slp";
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function = "pin_fun0";
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};
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rk817_slppin_slp: rk817_slppin_slp {
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pins = "gpio_slp";
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function = "pin_fun1";
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};
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rk817_slppin_pwrdn: rk817_slppin_pwrdn {
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pins = "gpio_slp";
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function = "pin_fun2";
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};
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rk817_slppin_rst: rk817_slppin_rst {
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pins = "gpio_slp";
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function = "pin_fun3";
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};
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};
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regulators {
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vdd_logic: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x2>;
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regulator-name = "vdd_logic";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x2>;
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regulator-name = "vdd_gpu";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-name = "vcc_ddr";
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vdd_npu: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x2>;
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regulator-name = "vdd_npu";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda0v9_image: LDO_REG1 {
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vdda0v9_image";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda_0v9: LDO_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vdda_0v9";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda0v9_pmu: LDO_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vdda0v9_pmu";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <900000>;
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};
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};
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vccio_acodec: LDO_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_acodec";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vccio_sd: LDO_REG5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_sd";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v3_pmu: LDO_REG6 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc3v3_pmu";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcca_1v8: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcca_1v8";
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regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcca1v8_pmu: LDO_REG8 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcca1v8_pmu";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vcca1v8_image: LDO_REG9 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcca1v8_image";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_1v8: DCDC_REG5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc_1v8";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_3v3: SWITCH_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vcc_3v3";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc3v3_sd: SWITCH_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vcc3v3_sd";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
};
|
|
|
|
rk809_codec: codec {
|
|
#sound-dai-cells = <1>;
|
|
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
|
|
clocks = <&cru I2S1_MCLKOUT>;
|
|
clock-names = "mclk";
|
|
assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
|
|
assigned-clock-rates = <12288000>;
|
|
assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2s1m0_mclk>;
|
|
hp-volume = <20>;
|
|
spk-volume = <3>;
|
|
mic-in-differential;
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c5 {
|
|
status = "okay";
|
|
i2c-scl-rising-time-ns = <160>;
|
|
i2c-scl-falling-time-ns = <30>;
|
|
clock-frequency = <400000>;
|
|
};
|
|
|
|
&i2s0_8ch {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2s1_8ch {
|
|
status = "disabled";
|
|
rockchip,clk-trcm = <1>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2s1m0_sclktx
|
|
&i2s1m0_lrcktx
|
|
&i2s1m0_sdi0
|
|
&i2s1m0_sdo0>;
|
|
};
|
|
|
|
&iep {
|
|
status = "okay";
|
|
};
|
|
|
|
&iep_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpegd {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpegd_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mpp_srv {
|
|
status = "okay";
|
|
};
|
|
|
|
&nandc0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
|
|
nand@0 {
|
|
reg = <0>;
|
|
nand-bus-width = <8>;
|
|
nand-ecc-mode = "hw";
|
|
nand-ecc-strength = <16>;
|
|
nand-ecc-step-size = <1024>;
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
gpio-key {
|
|
key1_pin: key1-pin {
|
|
rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
pmic_int: pmic_int {
|
|
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
soc_slppin_gpio: soc_slppin_gpio {
|
|
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>;
|
|
};
|
|
|
|
soc_slppin_slp: soc_slppin_slp {
|
|
rockchip,pins = <0 RK_PA2 1 &pcfg_pull_up>;
|
|
};
|
|
|
|
soc_slppin_rst: soc_slppin_rst {
|
|
rockchip,pins = <0 RK_PA2 2 &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
usb {
|
|
vcc5v0_host_en: vcc5v0-host-en {
|
|
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
vcc5v0_otg_en: vcc5v0-otg-en {
|
|
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/*
|
|
* There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7].
|
|
* 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured;
|
|
* 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages
|
|
* must be consistent with the software configuration correspondingly
|
|
* a/ When the hardware IO level is connected to 1.8V, the software voltage configuration
|
|
* should also be configured to 1.8V accordingly;
|
|
* b/ When the hardware IO level is connected to 3.3V, the software voltage configuration
|
|
* should also be configured to 3.3V accordingly;
|
|
* 3/ VCCIO2 voltage control selection (0xFDC20140)
|
|
* BIT[0]: 0x0: from GPIO_0A7 (default)
|
|
* BIT[0]: 0x1: from GRF
|
|
* Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7:
|
|
* L:VCCIO2 must supply 3.3V
|
|
* H:VCCIO2 must supply 1.8V
|
|
*/
|
|
&pmu_io_domains {
|
|
status = "okay";
|
|
pmuio2-supply = <&vcc3v3_pmu>;
|
|
vccio1-supply = <&vccio_acodec>;
|
|
vccio3-supply = <&vccio_sd>;
|
|
vccio4-supply = <&vcc_1v8>;
|
|
vccio5-supply = <&vcc_3v3>;
|
|
vccio6-supply = <&vcc_1v8>;
|
|
vccio7-supply = <&vcc_3v3>;
|
|
};
|
|
|
|
&pwm0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm4 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&pwm5 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&pwm7 {
|
|
status = "disabled";
|
|
|
|
compatible = "rockchip,remotectl-pwm";
|
|
remote_pwm_id = <3>;
|
|
handle_cpu_id = <1>;
|
|
remote_support_psci = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pwm7_pins>;
|
|
};
|
|
|
|
&reserved_memory {
|
|
linux,cma {
|
|
compatible = "shared-dma-pool";
|
|
inactive;
|
|
reusable;
|
|
reg = <0x0 0x10000000 0x0 0x00800000>;
|
|
linux,cma-default;
|
|
};
|
|
|
|
ramoops: ramoops@110000 {
|
|
compatible = "ramoops";
|
|
reg = <0x0 0x110000 0x0 0xf0000>;
|
|
record-size = <0x20000>;
|
|
console-size = <0x80000>;
|
|
ftrace-size = <0x00000>;
|
|
pmsg-size = <0x50000>;
|
|
};
|
|
};
|
|
|
|
&rk_rga {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec {
|
|
rockchip,disable-auto-freq;
|
|
assigned-clock-rates = <396000000>, <396000000>, <396000000>, <600000000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc {
|
|
venc-supply = <&vdd_logic>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rknpu {
|
|
rknpu-supply = <&vdd_npu>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rknpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rng {
|
|
status = "okay";
|
|
};
|
|
|
|
&rockchip_suspend {
|
|
status = "okay";
|
|
};
|
|
|
|
&route_hdmi {
|
|
status = "okay";
|
|
connect = <&vp0_out_hdmi>;
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
vref-supply = <&vcca_1v8>;
|
|
};
|
|
|
|
&sdhci {
|
|
bus-width = <8>;
|
|
no-sdio;
|
|
no-sd;
|
|
non-removable;
|
|
max-frequency = <200000000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
|
|
full-pwr-cycle-in-suspend;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc0 {
|
|
max-frequency = <150000000>;
|
|
no-sdio;
|
|
no-mmc;
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
disable-wp;
|
|
sd-uhs-sdr104;
|
|
vmmc-supply = <&vcc3v3_sd>;
|
|
vqmmc-supply = <&vccio_sd>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sfc {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "spi-nand";
|
|
reg = <0>;
|
|
spi-max-frequency = <75000000>;
|
|
spi-rx-bus-width = <4>;
|
|
spi-tx-bus-width = <1>;
|
|
};
|
|
};
|
|
|
|
&spdif_8ch {
|
|
status = "disabled";
|
|
};
|
|
|
|
&tsadc {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0_host {
|
|
phy-supply = <&vcc5v0_host>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1_host {
|
|
phy-supply = <&vcc5v0_otg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2phy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2phy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3 {
|
|
dr_mode = "otg";
|
|
extcon = <&usb2phy0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd30 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbhost_dwc3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbhost30 {
|
|
status = "okay";
|
|
};
|
|
|
|
&vad {
|
|
rockchip,audio-src = <&i2s1_8ch>;
|
|
rockchip,buffer-time-ms = <128>;
|
|
rockchip,det-channel = <0>;
|
|
rockchip,mode = <0>;
|
|
};
|
|
|
|
&vdpu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vdpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vepu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vepu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&video_phy0 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&video_phy1 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&vop {
|
|
status = "okay";
|
|
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
|
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
|
support-multi-area;
|
|
};
|
|
|
|
&vop_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vp0 {
|
|
rockchip,plane-mask = <(
|
|
1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
|
|
1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 )>;
|
|
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
|
|
cursor-win-id = <ROCKCHIP_VOP2_ESMART1>;
|
|
};
|
|
|
|
&vp1 {
|
|
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_SMART0 | 1 << ROCKCHIP_VOP2_SMART1)>;
|
|
rockchip,primary-plane = <ROCKCHIP_VOP2_SMART0>;
|
|
};
|
|
|
|
&vp2 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&wdt {
|
|
status = "okay";
|
|
};
|