You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
712 lines
12 KiB
712 lines
12 KiB
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
|
|
* (http://www.friendlyelec.com)
|
|
*
|
|
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
|
*/
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/pwm/pwm.h>
|
|
#include <dt-bindings/pinctrl/rockchip.h>
|
|
#include <dt-bindings/input/rk-input.h>
|
|
#include <dt-bindings/display/drm_mipi_dsi.h>
|
|
#include <dt-bindings/display/rockchip_vop.h>
|
|
#include <dt-bindings/sensor-dev.h>
|
|
#include <dt-bindings/usb/pd.h>
|
|
#include "rk3588s.dtsi"
|
|
#include "rk3588-android.dtsi"
|
|
#include "rk3588-rk806-single.dtsi"
|
|
|
|
/ {
|
|
model = "FriendlyElec boards based on Rockchip RK3588";
|
|
compatible = "friendlyelec,nanopi6",
|
|
"rockchip,rk3588";
|
|
|
|
aliases {
|
|
mmc0 = &sdmmc;
|
|
mmc1 = &sdio;
|
|
mmc2 = &sdhci;
|
|
};
|
|
|
|
chosen: chosen {
|
|
bootargs = "earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 coherent_pool=1m irqchip.gicv3_pseudo_nmi=0";
|
|
};
|
|
|
|
hdmi0_sound: hdmi0-sound {
|
|
status = "disabled";
|
|
compatible = "rockchip,hdmi";
|
|
rockchip,mclk-fs = <128>;
|
|
rockchip,card-name = "rockchip,hdmi0";
|
|
rockchip,cpu = <&i2s5_8ch>;
|
|
rockchip,codec = <&hdmi0>;
|
|
};
|
|
|
|
mach: board {
|
|
compatible = "friendlyelec,board";
|
|
machine = "NANOPI6";
|
|
hwrev = <255>;
|
|
model = "NanoPi 6 Series";
|
|
nvmem-cells = <&otp_id>, <&otp_cpu_version>;
|
|
nvmem-cell-names = "id", "cpu-version";
|
|
};
|
|
|
|
vcc5v0_sys: vcc5v0-sys {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc5v0_sys";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
};
|
|
|
|
vcc5v0_usb: vcc5v0-usb {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc5v0_usb";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
vin-supply = <&vcc5v0_sys>;
|
|
};
|
|
|
|
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc_1v1_nldo_s3";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1100000>;
|
|
regulator-max-microvolt = <1100000>;
|
|
vin-supply = <&vcc5v0_sys>;
|
|
};
|
|
|
|
vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
|
|
compatible = "regulator-fixed";
|
|
enable-active-high;
|
|
gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sd_s0_pwr>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-name = "vcc_3v3_sd_s0";
|
|
vin-supply = <&vcc_3v3_s3>;
|
|
};
|
|
|
|
vcc_3v3_pcie20: vcc3v3-pcie20 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc_3v3_pcie20";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
vin-supply = <&vcc_3v3_s3>;
|
|
};
|
|
|
|
vbus5v0_typec: vbus5v0-typec {
|
|
compatible = "regulator-fixed";
|
|
enable-active-high;
|
|
gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&typec5v_pwren>;
|
|
regulator-name = "vbus5v0_typec";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
vin-supply = <&vcc5v0_usb>;
|
|
};
|
|
|
|
pwm_backlight: pwm-backlight {
|
|
status = "disabled";
|
|
compatible = "pwm-backlight";
|
|
};
|
|
|
|
test-power {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&av1d_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&avsd {
|
|
status = "okay";
|
|
};
|
|
|
|
&combphy0_ps {
|
|
status = "okay";
|
|
};
|
|
|
|
&combphy2_psu {
|
|
status = "okay";
|
|
};
|
|
|
|
&cpu_l0 {
|
|
cpu-supply = <&vdd_cpu_lit_s0>;
|
|
mem-supply = <&vdd_cpu_lit_mem_s0>;
|
|
};
|
|
|
|
&cpu_b0 {
|
|
cpu-supply = <&vdd_cpu_big0_s0>;
|
|
mem-supply = <&vdd_cpu_big0_mem_s0>;
|
|
};
|
|
|
|
&cpu_b2 {
|
|
cpu-supply = <&vdd_cpu_big1_s0>;
|
|
mem-supply = <&vdd_cpu_big1_mem_s0>;
|
|
};
|
|
|
|
&gpu {
|
|
mali-supply = <&vdd_gpu_s0>;
|
|
mem-supply = <&vdd_gpu_mem_s0>;
|
|
upthreshold = <60>;
|
|
downdifferential = <30>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gmac1 {
|
|
/* Use rgmii-rxid mode to disable rx delay inside Soc */
|
|
phy-mode = "rgmii-rxid";
|
|
clock_in_out = "output";
|
|
|
|
snps,no-vlhash;
|
|
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
|
snps,reset-active-low;
|
|
/* Reset time is 20ms, 100ms for rtl8211f */
|
|
snps,reset-delays-us = <0 20000 100000>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&gmac1_miim
|
|
&gmac1_tx_bus2
|
|
&gmac1_rx_bus2
|
|
&gmac1_rgmii_clk
|
|
&gmac1_rgmii_bus>;
|
|
|
|
tx_delay = <0x42>;
|
|
/* rx_delay = <0x4f>; */
|
|
|
|
phy-handle = <&rgmii_phy1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&mdio1 {
|
|
rgmii_phy1: phy@1 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <0x1>;
|
|
};
|
|
};
|
|
|
|
&i2s5_8ch {
|
|
status = "okay";
|
|
};
|
|
|
|
&hdmi0 {
|
|
cec-enable;
|
|
enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
|
|
&hdmi0_in_vp0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&hdmi0_sound {
|
|
status = "okay";
|
|
};
|
|
|
|
&hdptxphy_hdmi0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&hdptxphy0 {
|
|
/* Single Vdiff Training Table for power reduction (optional) */
|
|
training-table = /bits/ 8 <
|
|
/* voltage swing 0, pre-emphasis 0->3 */
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
/* voltage swing 1, pre-emphasis 0->2 */
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
/* voltage swing 2, pre-emphasis 0->1 */
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
/* voltage swing 3, pre-emphasis 0 */
|
|
0x0d 0x00 0x00 0x00 0x00 0x00
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c0m2_xfer>;
|
|
|
|
vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 {
|
|
compatible = "rockchip,rk8602";
|
|
reg = <0x42>;
|
|
vin-supply = <&vcc5v0_sys>;
|
|
regulator-compatible = "rk860x-reg";
|
|
regulator-name = "vdd_cpu_big0_s0";
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
regulator-ramp-delay = <2300>;
|
|
rockchip,suspend-voltage-selector = <1>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 {
|
|
compatible = "rockchip,rk8603";
|
|
reg = <0x43>;
|
|
vin-supply = <&vcc5v0_sys>;
|
|
regulator-compatible = "rk860x-reg";
|
|
regulator-name = "vdd_cpu_big1_s0";
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
regulator-ramp-delay = <2300>;
|
|
rockchip,suspend-voltage-selector = <1>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
status = "okay";
|
|
|
|
vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 {
|
|
compatible = "rockchip,rk8602";
|
|
reg = <0x42>;
|
|
vin-supply = <&vcc5v0_sys>;
|
|
regulator-compatible = "rk860x-reg";
|
|
regulator-name = "vdd_npu_s0";
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <950000>;
|
|
regulator-ramp-delay = <2300>;
|
|
rockchip,suspend-voltage-selector = <1>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c3 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&i2c4 {
|
|
status = "disabled";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c4m3_xfer>;
|
|
};
|
|
|
|
&i2c5 {
|
|
status = "disabled";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c5m3_xfer>;
|
|
};
|
|
|
|
&i2c6 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c6m0_xfer>;
|
|
|
|
hym8563: hym8563@51 {
|
|
compatible = "haoyu,hym8563";
|
|
reg = <0x51>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
clock-output-names = "hym8563";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rtc_int>;
|
|
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
&i2c7 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&i2c8 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&iep {
|
|
status = "okay";
|
|
};
|
|
|
|
&iep_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpegd {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpegd_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege_ccu {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege0_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege1_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege2_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege3_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mpp_srv {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie2x1l1 {
|
|
reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
|
|
rockchip,init-delay-ms = <100>;
|
|
vpcie3v3-supply = <&vcc_3v3_pcie20>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie2x1l2 {
|
|
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc_3v3_pcie20>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
hym8563 {
|
|
rtc_int: rtc-int {
|
|
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
sdmmc {
|
|
sd_s0_pwr: sd-s0-pwr {
|
|
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
usb {
|
|
typec5v_pwren: typec5v-pwren {
|
|
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
/omit-if-no-ref/
|
|
usbc0_int: usbc0-int {
|
|
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm3 {
|
|
compatible = "rockchip,remotectl-pwm";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pwm3m0_pins>;
|
|
remote_pwm_id = <3>;
|
|
handle_cpu_id = <1>;
|
|
remote_support_psci = <0>;
|
|
status = "okay";
|
|
|
|
ir_key1 {
|
|
rockchip,usercode = <0xc43b>;
|
|
rockchip,key_table =
|
|
<0xff KEY_POWER>,
|
|
<0xef KEY_LEFT>,
|
|
<0xed KEY_RIGHT>,
|
|
<0xf2 KEY_UP>,
|
|
<0xea KEY_DOWN>,
|
|
<0xee 232>,
|
|
<0xe9 KEY_MUTE>,
|
|
<0xf1 KEY_VOLUMEDOWN>,
|
|
<0xf3 KEY_VOLUMEUP>,
|
|
<0xae KEY_MENU>,
|
|
<0xeb 172>,
|
|
<0xaf KEY_BACK>,
|
|
<0xf7 KEY_MODE>,
|
|
<0xe5 KEY_SYSRQ>,
|
|
<0xf5 580>,
|
|
<0xf6 204>;
|
|
};
|
|
};
|
|
|
|
&rga3_core0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rga3_0_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rga3_core1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rga3_1_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rga2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rknpu {
|
|
rknpu-supply = <&vdd_npu_s0>;
|
|
mem-supply = <&vdd_npu_mem_s0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rknpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec_ccu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec0_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec1_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc_ccu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc0 {
|
|
venc-supply = <&vdd_vdenc_s0>;
|
|
mem-supply = <&vdd_vdenc_mem_s0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc0_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc1 {
|
|
venc-supply = <&vdd_vdenc_s0>;
|
|
mem-supply = <&vdd_vdenc_mem_s0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc1_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&avcc_1v8_s0 {
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
&vdd_log_s0 {
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <750000>;
|
|
};
|
|
};
|
|
|
|
&rockchip_suspend {
|
|
status = "okay";
|
|
rockchip,sleep-debug-en = <1>;
|
|
rockchip,sleep-mode-config = <
|
|
(0
|
|
| RKPM_SLP_ARMOFF_DDRPD
|
|
)
|
|
>;
|
|
rockchip,wakeup-config = <
|
|
(0
|
|
| RKPM_CPU0_WKUP_EN
|
|
| RKPM_GPIO_WKUP_EN
|
|
)
|
|
>;
|
|
};
|
|
|
|
&route_hdmi0 {
|
|
status = "okay";
|
|
connect = <&vp0_out_hdmi0>;
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
vref-supply = <&avcc_1v8_s0>;
|
|
};
|
|
|
|
&sdhci {
|
|
bus-width = <8>;
|
|
no-sdio;
|
|
no-sd;
|
|
non-removable;
|
|
max-frequency = <200000000>;
|
|
mmc-hs400-1_8v;
|
|
mmc-hs400-enhanced-strobe;
|
|
full-pwr-cycle-in-suspend;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc {
|
|
max-frequency = <150000000>;
|
|
no-sdio;
|
|
no-mmc;
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
disable-wp;
|
|
sd-uhs-sdr104;
|
|
vmmc-supply = <&vcc_3v3_sd_s0>;
|
|
vqmmc-supply = <&vccio_sd_s0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
|
|
status = "okay";
|
|
};
|
|
|
|
&tsadc {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy2_host {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdp_phy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdp_phy0_u3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd3_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3_0 {
|
|
dr_mode = "otg";
|
|
extcon = <&u2phy0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbhost3_0 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&usbhost_dwc3_0 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&vdpu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vdpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vop {
|
|
assigned-clocks = <&cru ACLK_VOP>;
|
|
assigned-clock-rates = <800000000>;
|
|
support-multi-area;
|
|
status = "okay";
|
|
};
|
|
|
|
&vop_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
/* vp0 & vp1 splice for 8K output */
|
|
&vp0 {
|
|
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
|
|
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
|
|
};
|
|
|
|
&vp1 {
|
|
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
|
|
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
|
|
};
|
|
|
|
&vp2 {
|
|
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>;
|
|
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>;
|
|
};
|
|
|
|
&vp3 {
|
|
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
|
|
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
|
|
};
|
|
|
|
&wdt {
|
|
status = "okay";
|
|
};
|