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/*
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* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/include/ "skeleton.dtsi"
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/ {
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cpu_card {
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core_clk: core_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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u-boot,dm-pre-reloc;
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};
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};
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};
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