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rk35xx-android14
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[kernel] merge commit '97200b6a4b..b82a697bd7'

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Signed-off-by: hmz007 <hmz007@gmail.com>
Change-Id: I12c3b2c2e181dcae1aa9ecccbdd5500adb784ca0
master
hmz007 1 year ago
parent d065db1fec
commit 256205d3c7
14 changed files with 1952 additions and 13 deletions
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5
kernel-6.1/arch/arm64/boot/dts/rockchip/Makefile
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@ -19,6 +19,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3566-nanopi-r3-rev01.dtb \
rk3566-nanopi-r3-rev02.dtb \
rk3566-nanopi-r3-rev07.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
@ -29,6 +30,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3568-nanopi5-rev05.dtb \
rk3568-nanopi5-rev07.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3576-nanopi5-rev01.dtb \
rk3576-nanopi5-rev02.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3588-nanopi6-rev01.dtb \
rk3588-nanopi6-rev02.dtb \

6
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3-rev01.dts
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@ -316,20 +316,14 @@ dsi1_pwm: &pwm4 {
status = "okay";
};
&vop {
disable-win-move;
};
&vp0 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER0>;
/delete-property/ cursor-win-id;
};
&vp1 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_ESMART0 | 1 << ROCKCHIP_VOP2_SMART0)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
cursor-win-id = <ROCKCHIP_VOP2_SMART0>;
};
&vp2 {

52
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3-rev02.dts
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@ -0,0 +1,52 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*/
/dts-v1/;
#include "rk3566-nanopi-r3-rev01.dts"
/ {
model = "FriendlyElec NanoPi R3S LTS";
compatible = "friendlyelec,nanopi-r3s", "rockchip,rk3568";
};
&mach {
hwrev = <2>;
model = "NanoPi R3S LTS";
};
&i2s1_8ch {
status = "okay";
};
&rk809_codec {
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_mclk>;
status = "okay";
};
&rk809_sound {
pinctrl-names = "default";
status = "okay";
};
&vp0 {
rockchip,plane-mask = <(
1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
1 << ROCKCHIP_VOP2_SMART0)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
};
&vp1 {
/delete-property/ rockchip,plane-mask;
/delete-property/ rockchip,primary-plane;
status = "disabled";
};
&vp2 {
/delete-property/ rockchip,plane-mask;
/delete-property/ rockchip,primary-plane;
status = "disabled";
};

1
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-common.dtsi
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@ -964,7 +964,6 @@
1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 )>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
cursor-win-id = <ROCKCHIP_VOP2_ESMART1>;
};
&vp1 {

3
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3568-nanopi5-rev05.dts
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@ -43,7 +43,8 @@
<0xf1 KEY_VOLUMEDOWN>,
<0xf3 KEY_VOLUMEUP>,
<0xae KEY_MENU>,
<0xeb KEY_LEFTMETA>,
<0xeb KEY_RIGHTMETA>,
<0xcc 204>,
<0xaf KEY_BACK>,
<0xf7 KEY_MODE>,
<0xe5 KEY_SYSRQ>,

876
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3576-nanopi5-common.dtsi
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@ -0,0 +1,876 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/display/rockchip_vop.h>
#include <dt-bindings/usb/pd.h>
#include "rk3576.dtsi"
#include "rk3576-rk806.dtsi"
#include "rk3576-android.dtsi"
/ {
model = "FriendlyElec boards based on Rockchip RK3576";
compatible = "friendlyelec,nanopi5",
"rockchip,rk3576";
aliases {
mmc0 = &sdmmc;
mmc1 = &sdio;
mmc2 = &sdhci;
scsi0 = &lun0;
scsi1 = &lun1;
scsi2 = &lun2;
scsi3 = &lun3;
};
chosen: chosen {
bootargs = "earlycon=uart8250,mmio32,0x2ad40000 console=ttyFIQ0 coherent_pool=1m rcupdate.rcu_expedited=1 rcu_nocbs=all";
bootargs_ext = "root=/dev/sda8 rw rootfstype=ext4 rootflags=discard consoleblank=0";
};
adc0_keys: adc0-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
vol-down-key {
label = "back";
linux,code = <KEY_BACK>;
press-threshold-microvolt = <17000>;
};
};
adc1_keys: adc1-keys {
compatible = "adc-keys";
io-channels = <&saradc 1>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
vol-up-key {
label = "volume up";
linux,code = <KEY_VOLUMEUP>;
press-threshold-microvolt = <17000>;
};
};
dp0_sound: dp0-sound {
status = "disabled";
compatible = "rockchip,hdmi";
rockchip,mclk-fs = <512>;
rockchip,card-name = "rockchip,dp0";
rockchip,cpu = <&spdif_tx3>;
rockchip,codec = <&dp0 1>;
};
hdmi_sound: hdmi-sound {
compatible = "rockchip,hdmi";
rockchip,mclk-fs = <128>;
rockchip,card-name = "rockchip,hdmi0";
rockchip,cpu = <&sai6>;
rockchip,codec = <&hdmi>;
rockchip,jack-det;
};
mach: board {
compatible = "friendlyelec,board";
machine = "NANOPI-M5";
hwrev = <255>;
model = "NanoPi M5 Series";
nvmem-cells = <&otp_id>, <&otp_cpu_version>;
nvmem-cell-names = "id", "cpu-version";
};
fan: pwm-fan {
status = "okay";
compatible = "pwm-fan";
#cooling-cells = <2>;
fan-supply = <&vcc_sys>;
pwms = <&pwm0_2ch_1 0 50000 0>;
cooling-levels = <0 45 70 110 160 255>;
rockchip,hold-time-ms = <2000>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
pwm_backlight: pwm-backlight {
status = "disabled";
compatible = "pwm-backlight";
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&wifi_poweren_gpio>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
post-power-on-delay-ms = <200>;
reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
status = "disabled";
};
simple_bat: battery {
compatible = "simple-battery";
voltage-max-design-microvolt = <21000000>;
voltage-min-design-microvolt = <4500000>;
};
simple_vin: simple-vin {
compatible = "simple-adc-power-v2";
io-channels = <&saradc 2>;
io-channel-names = "voltage";
monitored-battery = <&simple_bat>;
};
test-power {
status = "okay";
};
vcc_1v8_s0: vcc-1v8-s0 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8_s0";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_1v8_s3>;
};
vcc_3v3_s0: vcc-3v3-s0 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_s0";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
vcc_ufs_s0: vcc-ufs-s0 {
compatible = "regulator-fixed";
regulator-name = "vcc_ufs_s0";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_sys>;
};
vcc1v8_ufs_vccq2_s0: vcc1v8-ufs-vccq2-s0 {
compatible = "regulator-fixed";
regulator-name = "vcc1v8_ufs_vccq2_s0";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_1v8_s3>;
};
vcc1v2_ufs_vccq_s0: vcc1v2-ufs-vccq-s0 {
compatible = "regulator-fixed";
regulator-name = "vcc1v2_ufs_vccq_s0";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&vcc_sys>;
};
vcc3v3_lcd_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
regulator-boot-on;
enable-active-high;
gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc_3v3_s0>;
};
vcc5v0_host: vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_device>;
pinctrl-names = "default";
pinctrl-0 = <&usb_host_pwren>;
};
vbus5v0_typec: vbus5v0-typec {
compatible = "regulator-fixed";
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_device>;
pinctrl-names = "default";
pinctrl-0 = <&usb_otg0_pwren>;
};
/*
vcc_mipicsi0: vcc-mipicsi0-regulator {
compatible = "regulator-fixed";
gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipicsi0_pwr>;
regulator-name = "vcc_mipicsi0";
enable-active-high;
};
vcc_mipicsi1: vcc-mipicsi1-regulator {
compatible = "regulator-fixed";
gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipicsi1_pwr>;
regulator-name = "vcc_mipicsi1";
enable-active-high;
};
vcc_mipidcphy0: vcc-mipidcphy0-regulator {
compatible = "regulator-fixed";
gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipidcphy0_pwr>;
regulator-name = "vcc_mipidcphy0";
enable-active-high;
};
*/
vcc12v_dcin: vcc12v-dcin {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_device: vcc5v0-device {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_device";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc_2v0_pldo_s3: vcc-2v0-pldo-s3 {
compatible = "regulator-fixed";
regulator-name = "vcc_2v0_pldo_s3";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
vin-supply = <&vcc_sys>;
};
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v1_nldo_s3";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc_sys>;
};
vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sd_s0_pwr>;
regulator-boot-on;
regulator-max-microvolt = <3000000>;
regulator-min-microvolt = <3000000>;
regulator-name = "vcc_3v3_sd_s0";
vin-supply = <&vcc_3v3_s3>;
};
vcc3v3_m2_keym: vcc3v3-m2_keym {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_m2_pwren>;
regulator-name = "vcc3v3_m2_keym";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_sys>;
};
};
&combphy0_ps {
#phy-cells = <2>;
rockchip,ebuff-mode;
status = "okay";
};
&combphy1_psu {
status = "okay";
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_big_s0>;
};
&crypto {
status = "okay";
};
&display_subsystem {
clocks = <&hdptxphy_hdmi>;
clock-names = "hdmi0_phy_pll";
};
&gpu {
compatible = "rockchip,rk3576-mali", "arm,mali-bifrost";
assigned-clocks = <&scmi_clk CLK_GPU>;
assigned-clock-rates = <198000000>;
clocks = <&cru CLK_GPU>;
clock-names = "core";
interrupt-names = "gpu", "mmu", "job";
mali-supply = <&vdd_gpu_s0>;
status = "okay";
};
&gmac0 {
/* Use rgmii-rxid mode to disable rx delay inside Soc */
phy-mode = "rgmii-rxid";
clock_in_out = "output";
snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
pinctrl-names = "default";
pinctrl-0 = <&eth0m0_miim
&eth0m0_tx_bus2
&eth0m0_rx_bus2
&eth0m0_rgmii_clk
&eth0m0_rgmii_bus>;
tx_delay = <0x21>;
/* rx_delay = <0x3f>; */
phy-handle = <&rgmii_phy0>;
status = "okay";
};
&gmac1 {
/* Use rgmii-rxid mode to disable rx delay inside Soc */
phy-mode = "rgmii-rxid";
clock_in_out = "output";
snps,reset-gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
pinctrl-names = "default";
pinctrl-0 = <&eth1m0_miim
&eth1m0_tx_bus2
&eth1m0_rx_bus2
&eth1m0_rgmii_clk
&eth1m0_rgmii_bus>;
tx_delay = <0x20>;
/* rx_delay = <0x3f>; */
phy-handle = <&rgmii_phy1>;
status = "okay";
};
&hdmi {
status = "okay";
enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
rockchip,sda-falling-delay-ns = <360>;
audio-no-capture;
};
&hdmi_in_vp0 {
status = "okay";
};
&hdptxphy_hdmi {
status = "okay";
};
&i2c0 {
pinctrl-0 = <&i2c0m1_xfer>;
status = "okay";
};
&i2c2 {
status = "okay";
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
};
};
&iep {
status = "okay";
};
&iep_mmu {
status = "okay";
};
&jpegd {
status = "okay";
};
&jpege {
status = "okay";
};
&jpeg_mmu {
status = "okay";
};
&mdio0 {
rgmii_phy0: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
clocks = <&cru REFCLKO25M_GMAC0_OUT>;
interrupt-parent = <&gpio2>;
interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_int>;
realtek,ledsel = <0xae00>;
};
};
&mdio1 {
rgmii_phy1: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
clocks = <&cru REFCLKO25M_GMAC1_OUT>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1_int>;
realtek,ledsel = <0xae00>;
};
};
&mpp_srv {
status = "okay";
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_m2_prsnt>;
phys = <&combphy0_ps PHY_TYPE_PCIE 0>;
prsnt-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
rockchip,skip-scan-in-resume;
rockchip,skip-hw-retry;
rockchip,wait-for-link-ms = <1000>;
vpcie3v3-supply = <&vcc3v3_m2_keym>;
status = "okay";
};
&pdm1 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pdm1m1_clk0
&pdm1m1_clk1
&pdm1m1_sdi0
&pdm1m1_sdi1
&pdm1m1_sdi2
&pdm1m1_sdi3>;
};
&pinctrl {
cam {
mipicsi0_pwr: mipicsi0-pwr {
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
mipicsi1_pwr: mipicsi1-pwr {
rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
mipidcphy0_pwr: mipidcphy0-pwr {
rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gmac {
gmac0_int: gmac0-int {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
gmac1_int: gmac1-int {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pcie {
pcie_m2_pwren: pcie-m2-pwren {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_m2_prsnt: pcie-m20-prsnt {
rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sd_s0_pwr: sd-s0-pwr {
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
wireless-wlan {
/omit-if-no-ref/
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
wifi_poweren_gpio: wifi-poweren-gpio {
rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
touch {
/omit-if-no-ref/
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
usb_host_pwren: usb-host-pwren {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb_otg0_pwren: usb-otg0-pwren {
rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm0_2ch_1 {
status = "okay";
};
&pwm1_6ch_1 {
status = "okay";
pinctrl-0 = <&pwm1m0_ch1>;
};
&rga2_core0 {
status = "okay";
};
&rga2_core0_mmu {
status = "okay";
};
&rga2_core1 {
status = "okay";
};
&rga2_core1_mmu {
status = "okay";
};
&rknpu {
rknpu-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknpu_mmu {
status = "okay";
};
&rkvenc_ccu {
status = "okay";
};
&rkvenc0 {
status = "okay";
};
&rkvenc0_mmu {
status = "okay";
};
&rkvenc1 {
status = "okay";
};
&rkvenc1_mmu {
status = "okay";
};
&rkvdec {
status = "okay";
};
&rkvdec_mmu {
status = "okay";
};
&rockchip_suspend {
status = "okay";
rockchip,sleep-debug-en = <1>;
rockchip,sleep-io-ret-config = <
(0
| RKPM_VCCIO3_RET_EN
)
>;
rockchip,regulator-on-before-mem = <&vdd_npu_s0>;
};
&route_hdmi {
status = "okay";
connect = <&vp0_out_hdmi>;
};
&sai1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&sai1m0_lrck
&sai1m0_sclk
&sai1m0_sdi0
&sai1m0_sdo0>;
};
&sai6 {
status = "okay";
};
&saradc {
status = "okay";
vref-supply = <&vcca_1v8_s0>;
};
&sata0 {
phys = <&combphy0_ps PHY_TYPE_SATA 1>;
target-supply = <&vcc3v3_m2_keym>;
status = "okay";
};
&sdhci {
bus-width = <8>;
no-sdio;
no-sd;
non-removable;
max-frequency = <200000000>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
full-pwr-cycle-in-suspend;
status = "okay";
};
&sdio {
max-frequency = <200000000>;
no-sd;
no-mmc;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1m0_bus4 &sdmmc1m0_clk &sdmmc1m0_cmd>;
sd-uhs-sdr104;
status = "disabled";
};
&sdmmc {
max-frequency = <200000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_sd_s0>;
vqmmc-supply = <&vccio_sd_s0>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
status = "okay";
};
&spdif_tx3 {
status = "okay";
};
&tsadc {
status = "okay";
};
&u2phy0 {
status = "okay";
};
&u2phy1 {
status = "okay";
};
&u2phy0_otg {
status = "okay";
phy-supply = <&vbus5v0_typec>;
};
&u2phy1_otg {
status = "okay";
phy-supply = <&vcc5v0_host>;
};
&ufs {
status = "okay";
reset-gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
scsi {
#address-cells = <1>;
#size-cells = <0>;
lun0: lun@0 {
reg = <0>;
};
lun1: lun@1 {
reg = <1>;
};
lun2: lun@2 {
reg = <2>;
};
lun3: lun@3 {
reg = <3>;
};
};
};
&usbdp_phy {
status = "okay";
};
&usbdp_phy_dp {
status = "okay";
};
&usbdp_phy_u3 {
status = "okay";
};
&usb_drd0_dwc3 {
dr_mode = "otg";
extcon = <&u2phy0>;
role-switch-default-mode = "host";
role-switch-visible;
usb-role-switch;
status = "okay";
};
&usb_drd1_dwc3 {
dr_mode = "host";
status = "okay";
};
&vdpp {
status = "okay";
};
&vop {
status = "okay";
vop-supply = <&vdd_logic_s0>;
};
&vop_mmu {
status = "okay";
};
&vp0 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER0>;
};
&vp1 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER1>;
};
&vp2 {
assigned-clocks = <&cru DCLK_VP2_SRC>;
assigned-clock-parents = <&cru PLL_VPLL>;
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_ESMART2 | 1 << ROCKCHIP_VOP2_ESMART3)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>;
};
&wdt {
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
#define HAS_PWM_BACKLIGHT 1
&pwm_backlight {
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
#if defined(ENABLE_MIPI_DSI0)
&dsi {
dsi0_panel: panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&pwm_backlight>;
panel-name = "EVB10a,400dpi";
power-supply = <&vcc3v3_lcd_n>;
rotation = <0>;
reset-delay-ms = <10>;
enable-delay-ms = <10>;
prepare-delay-ms = <10>;
unprepare-delay-ms = <10>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
23 00 02 FE 21
23 00 02 04 00
23 00 02 00 64
23 00 02 2A 00
23 00 02 26 64
23 00 02 54 00
23 00 02 50 64
23 00 02 7B 00
23 00 02 77 64
23 00 02 A2 00
23 00 02 9D 64
23 00 02 C9 00
23 00 02 C5 64
23 00 02 01 71
23 00 02 27 71
23 00 02 51 71
23 00 02 78 71
23 00 02 9E 71
23 00 02 C6 71
23 00 02 02 89
23 00 02 28 89
23 00 02 52 89
23 00 02 79 89
23 00 02 9F 89
23 00 02 C7 89
23 00 02 03 9E
23 00 02 29 9E
23 00 02 53 9E
23 00 02 7A 9E
23 00 02 A0 9E
23 00 02 C8 9E
23 00 02 09 00
23 00 02 05 B0
23 00 02 31 00
23 00 02 2B B0
23 00 02 5A 00
23 00 02 55 B0
23 00 02 80 00
23 00 02 7C B0
23 00 02 A7 00
23 00 02 A3 B0
23 00 02 CE 00
23 00 02 CA B0
23 00 02 06 C0
23 00 02 2D C0
23 00 02 56 C0
23 00 02 7D C0
23 00 02 A4 C0
23 00 02 CB C0
23 00 02 07 CF
23 00 02 2F CF
23 00 02 58 CF
23 00 02 7E CF
23 00 02 A5 CF
23 00 02 CC CF
23 00 02 08 DD
23 00 02 30 DD
23 00 02 59 DD
23 00 02 7F DD
23 00 02 A6 DD
23 00 02 CD DD
23 00 02 0E 15
23 00 02 0A E9
23 00 02 36 15
23 00 02 32 E9
23 00 02 5F 15
23 00 02 5B E9
23 00 02 85 15
23 00 02 81 E9
23 00 02 AD 15
23 00 02 A9 E9
23 00 02 D3 15
23 00 02 CF E9
23 00 02 0B 14
23 00 02 33 14
23 00 02 5C 14
23 00 02 82 14
23 00 02 AA 14
23 00 02 D0 14
23 00 02 0C 36
23 00 02 34 36
23 00 02 5D 36
23 00 02 83 36
23 00 02 AB 36
23 00 02 D1 36
23 00 02 0D 6B
23 00 02 35 6B
23 00 02 5E 6B
23 00 02 84 6B
23 00 02 AC 6B
23 00 02 D2 6B
23 00 02 13 5A
23 00 02 0F 94
23 00 02 3B 5A
23 00 02 37 94
23 00 02 64 5A
23 00 02 60 94
23 00 02 8A 5A
23 00 02 86 94
23 00 02 B2 5A
23 00 02 AE 94
23 00 02 D8 5A
23 00 02 D4 94
23 00 02 10 D1
23 00 02 38 D1
23 00 02 61 D1
23 00 02 87 D1
23 00 02 AF D1
23 00 02 D5 D1
23 00 02 11 04
23 00 02 39 04
23 00 02 62 04
23 00 02 88 04
23 00 02 B0 04
23 00 02 D6 04
23 00 02 12 05
23 00 02 3A 05
23 00 02 63 05
23 00 02 89 05
23 00 02 B1 05
23 00 02 D7 05
23 00 02 18 AA
23 00 02 14 36
23 00 02 42 AA
23 00 02 3D 36
23 00 02 69 AA
23 00 02 65 36
23 00 02 8F AA
23 00 02 8B 36
23 00 02 B7 AA
23 00 02 B3 36
23 00 02 DD AA
23 00 02 D9 36
23 00 02 15 74
23 00 02 3F 74
23 00 02 66 74
23 00 02 8C 74
23 00 02 B4 74
23 00 02 DA 74
23 00 02 16 9F
23 00 02 40 9F
23 00 02 67 9F
23 00 02 8D 9F
23 00 02 B5 9F
23 00 02 DB 9F
23 00 02 17 DC
23 00 02 41 DC
23 00 02 68 DC
23 00 02 8E DC
23 00 02 B6 DC
23 00 02 DC DC
23 00 02 1D FF
23 00 02 19 03
23 00 02 47 FF
23 00 02 43 03
23 00 02 6E FF
23 00 02 6A 03
23 00 02 94 FF
23 00 02 90 03
23 00 02 BC FF
23 00 02 B8 03
23 00 02 E2 FF
23 00 02 DE 03
23 00 02 1A 35
23 00 02 44 35
23 00 02 6B 35
23 00 02 91 35
23 00 02 B9 35
23 00 02 DF 35
23 00 02 1B 45
23 00 02 45 45
23 00 02 6C 45
23 00 02 92 45
23 00 02 BA 45
23 00 02 E0 45
23 00 02 1C 55
23 00 02 46 55
23 00 02 6D 55
23 00 02 93 55
23 00 02 BB 55
23 00 02 E1 55
23 00 02 22 FF
23 00 02 1E 68
23 00 02 4C FF
23 00 02 48 68
23 00 02 73 FF
23 00 02 6F 68
23 00 02 99 FF
23 00 02 95 68
23 00 02 C1 FF
23 00 02 BD 68
23 00 02 E7 FF
23 00 02 E3 68
23 00 02 1F 7E
23 00 02 49 7E
23 00 02 70 7E
23 00 02 96 7E
23 00 02 BE 7E
23 00 02 E4 7E
23 00 02 20 97
23 00 02 4A 97
23 00 02 71 97
23 00 02 97 97
23 00 02 BF 97
23 00 02 E5 97
23 00 02 21 B5
23 00 02 4B B5
23 00 02 72 B5
23 00 02 98 B5
23 00 02 C0 B5
23 00 02 E6 B5
23 00 02 25 F0
23 00 02 23 E8
23 00 02 4F F0
23 00 02 4D E8
23 00 02 76 F0
23 00 02 74 E8
23 00 02 9C F0
23 00 02 9A E8
23 00 02 C4 F0
23 00 02 C2 E8
23 00 02 EA F0
23 00 02 E8 E8
23 00 02 24 FF
23 00 02 4E FF
23 00 02 75 FF
23 00 02 9B FF
23 00 02 C3 FF
23 00 02 E9 FF
23 00 02 FE 3D
23 00 02 00 04
23 00 02 FE 23
23 00 02 08 82
23 00 02 0A 00
23 00 02 0B 00
23 00 02 0C 01
23 00 02 16 00
23 00 02 18 02
23 00 02 1B 04
23 00 02 19 04
23 00 02 1C 81
23 00 02 1F 00
23 00 02 20 03
23 00 02 23 04
23 00 02 21 01
23 00 02 54 63
23 00 02 55 54
23 00 02 6E 45
23 00 02 6D 36
23 00 02 FE 3D
23 00 02 55 78
23 00 02 FE 20
23 00 02 26 30
23 00 02 FE 3D
23 00 02 20 71
23 00 02 50 8F
23 00 02 51 8F
23 00 02 FE 00
23 00 02 35 00
05 78 01 11
05 00 01 29
];
panel-exit-sequence = [
05 00 01 28
05 00 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi_timing0>;
dsi_timing0: timing0 {
clock-frequency = <132000000>;
hactive = <1080>;
vactive = <1920>;
hfront-porch = <15>;
hsync-len = <4>;
hback-porch = <30>;
vfront-porch = <15>;
vsync-len = <2>;
vback-porch = <15>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi0: endpoint {
remote-endpoint = <&dsi0_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi0_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi0>;
};
};
};
};
&dsi0_i2c {
dsi0_gt1x: gt1x@14 {
compatible = "goodix,gt1x";
reg = <0x14>;
pinctrl-names = "default";
pinctrl-0 = <&touch_dsi0_gpio>;
goodix,irq-gpio = <&gpio0 RK_PD0 IRQ_TYPE_LEVEL_LOW>;
goodix,rst-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
keep-otp-config;
};
};
#endif

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*/
/dts-v1/;
#include "rk3576-nanopi5-common.dtsi"
/ {
model = "FriendlyElec NanoPi M5";
compatible = "friendlyelec,nanopi-m5", "rockchip,rk3576";
gpio_keys: gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key1_pin>;
button@1 {
debounce-interval = <50>;
gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
label = "K1";
linux,code = <BTN_1>;
wakeup-source;
};
};
gpio_leds: gpio-leds {
compatible = "gpio-leds";
sys_led: led-0 {
gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
label = "sys_led";
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&sys_led_pin>;
};
lan_led: led-1 {
gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
label = "lan_led";
pinctrl-names = "default";
pinctrl-0 = <&lan_led_pin>;
};
wan_led: led-2 {
gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
label = "wan_led";
pinctrl-names = "default";
pinctrl-0 = <&wan_led_pin>;
};
};
rt5616_sound: rt5616-sound {
status = "okay";
compatible = "simple-audio-card";
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
simple-audio-card,name = "realtek,rt5616-codec";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,hp-det-gpio = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
simple-audio-card,hp-pin-name = "Headphone Jack";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Microphone", "Microphone Jack";
simple-audio-card,routing =
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"MIC1", "Microphone Jack",
"Microphone Jack", "micbias1";
simple-audio-card,cpu {
sound-dai = <&sai2>;
};
simple-audio-card,codec {
sound-dai = <&rt5616>;
};
};
};
&mach {
hwrev = <0x01>;
model = "NanoPi M5";
};
&i2c5 {
status = "okay";
clock-frequency = <200000>;
pinctrl-0 = <&i2c5m3_xfer>;
rt5616: rt5616@1b {
status = "okay";
#sound-dai-cells = <0>;
compatible = "rt5616";
reg = <0x1b>;
clocks = <&mclkout_sai2>;
clock-names = "mclk";
assigned-clocks = <&mclkout_sai2>;
assigned-clock-rates = <12288000>;
pinctrl-names = "default";
pinctrl-0 = <&sai2m0_mclk>;
};
};
&i2c8 {
clock-frequency = <200000>;
pinctrl-0 = <&i2c8m2_xfer>;
};
&pinctrl {
gpio-key {
key1_pin: key1-pin {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
gpio-leds {
sys_led_pin: sys-led-pin {
rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
lan_led_pin: lan-led-pin {
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
wan_led_pin: wan-led-pin {
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
/omit-if-no-ref/
lcd_rst0_gpio: lcd-rst0-gpio {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
/omit-if-no-ref/
touch_dsi0_gpio: touch-dsi0-gpio {
rockchip,pins =
<0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sai2 {
status = "okay";
};
&sdhci {
status = "disabled";
};
&sdio_pwrseq {
status = "okay";
};
&sdio {
status = "okay";
vqmmc-supply = <&vcc_1v8_s0>;
sd-uhs-sdr104;
#address-cells = <1>;
#size-cells = <0>;
rtl8822cs@1 {
reg = <1>;
compatible = "realtek,rtl8822cs";
};
};
&fspi1m1_pins {
rockchip,pins =
/* clk, d0~4 */
<1 RK_PD5 3 &pcfg_pull_none>,
<1 RK_PC4 3 &pcfg_pull_none>,
<1 RK_PC5 3 &pcfg_pull_none>,
<1 RK_PC6 3 &pcfg_pull_none>,
<1 RK_PC7 3 &pcfg_pull_none>;
};
&sfc1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&fspi1m1_csn0 &fspi1m1_pins>;
#address-cells = <1>;
#size-cells = <0>;
spi-nor@0 {
compatible = "jedec,spi-nor";
label = "sfc_nor";
reg = <0>;
m25p,fast-read;
spi-max-frequency = <20000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer &uart5m0_ctsn &uart5m0_rtsn>;
status = "okay";
bluetooth {
compatible = "realtek,rtl8822cs-bt";
enable-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
host-wake-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
device-wake-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
};
};
&usbdp_phy_dp {
status = "disabled";
};
&vp0 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
1 << ROCKCHIP_VOP2_ESMART2)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
};
&vp1 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 |
1 << ROCKCHIP_VOP2_ESMART3)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
};
&vp2 {
/delete-property/ rockchip,plane-mask;
/delete-property/ rockchip,primary-plane;
status = "disabled";
};
/* MIPI-DSI */
#define ENABLE_MIPI_DSI0 0
#if (ENABLE_MIPI_DSI0)
dsi0_i2c: &i2c8 {
status = "okay";
};
dsi0_pwm: &pwm1_6ch_0 {
status = "okay";
};
&dsi {
status = "okay";
};
&dsi_in_vp1 {
status = "okay";
};
&pwm_backlight {
status = "okay";
pwms = <&dsi0_pwm 0 25000 0>;
};
&route_dsi {
status = "okay";
connect = <&vp1_out_dsi>;
};
#include "rk3576-nanopi5-mipi-evb-v10.dtsi"
#endif
/* GPIO Connector */
&spi3 {
status = "disabled";
pinctrl-0 = <&spi3m2_csn0 &spi3m2_csn1 &spi3m2_pins>;
spidev0: spidev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <10000000>;
status = "disabled";
};
};
&sai1 {
status = "disabled";
};
&uart2 {
pinctrl-0 = <&uart2m1_xfer &uart2m1_ctsn &uart2m1_rtsn>;
status = "disabled";
};
&uart3 {
pinctrl-0 = <&uart3m0_xfer>;
status = "okay";
};
&uart8 {
pinctrl-0 = <&uart8m1_xfer>;
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*/
/dts-v1/;
#include "rk3576-nanopi5-common.dtsi"
/ {
model = "FriendlyElec NanoPi R76S";
compatible = "friendlyelec,nanopi-r76s", "rockchip,rk3576";
aliases {
ethernet0 = &r8125_b;
ethernet1 = &r8125_a;
};
gpio_keys: gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key1_pin>;
button@1 {
debounce-interval = <50>;
gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>;
label = "K1";
linux,code = <BTN_1>;
wakeup-source;
};
};
gpio_leds: gpio-leds {
compatible = "gpio-leds";
sys_led: led-0 {
gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
label = "sys_led";
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&sys_led_pin>;
};
lan_led: led-1 {
gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
label = "lan_led";
pinctrl-names = "default";
pinctrl-0 = <&lan_led_pin>;
};
wan_led: led-2 {
gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
label = "wan_led";
pinctrl-names = "default";
pinctrl-0 = <&wan_led_pin>;
};
};
vcc_3v3_pcie20: vcc3v3-pcie20 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_pcie20";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
};
&mach {
hwrev = <0x02>;
model = "NanoPi R76S";
};
&mdio0 {
status = "disabled";
};
&mdio1 {
status = "disabled";
};
&gmac0 {
status = "disabled";
};
&gmac1 {
status = "disabled";
};
&adc1_keys {
status = "disabled";
};
&i2c5 {
status = "okay";
clock-frequency = <200000>;
pinctrl-0 = <&i2c5m3_xfer>;
};
&i2c8 {
clock-frequency = <200000>;
pinctrl-0 = <&i2c8m2_xfer>;
};
&pinctrl {
gpio-key {
key1_pin: key1-pin {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
gpio-leds {
sys_led_pin: sys-led-pin {
rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
lan_led_pin: lan-led-pin {
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
wan_led_pin: wan-led-pin {
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie0_reset_gpio: pcie0-reset-gpio {
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie1_reset_gpio: pcie1-reset-gpio {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pcie0 {
status = "okay";
pinctrl-0 = <&pcie0_reset_gpio>;
phys = <&combphy0_ps PHY_TYPE_PCIE 1>;
reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
rockchip,init-delay-ms = <100>;
rockchip,skip-scan-in-resume;
rockchip,skip-hw-retry;
rockchip,wait-for-link-ms = <1000>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
/delete-property/ prsnt-gpios;
pcie@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
r8125_a: pcie@0,0 {
reg = <0x000000 0 0 0 0>;
local-mac-address = [ 00 00 00 00 00 00 ];
};
};
};
&pcie1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pcie1_reset_gpio>;
reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
rockchip,skip-scan-in-resume;
rockchip,skip-hw-retry;
rockchip,wait-for-link-ms = <1000>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
pcie@0,0 {
reg = <0x00200000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
r8125_b: pcie@20,0 {
reg = <0x000000 0 0 0 0>;
local-mac-address = [ 00 00 00 00 00 00 ];
};
};
};
&sata0 {
status = "disabled";
};
&sdio_pwrseq {
status = "okay";
};
&sdio {
status = "okay";
vqmmc-supply = <&vcc_1v8_s0>;
sd-uhs-sdr104;
#address-cells = <1>;
#size-cells = <0>;
rtl8822cs@1 {
reg = <1>;
compatible = "realtek,rtl8822cs";
};
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer &uart5m0_ctsn &uart5m0_rtsn>;
status = "okay";
bluetooth {
compatible = "realtek,rtl8822cs-bt";
enable-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
host-wake-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
device-wake-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
};
};
&ufs {
status = "disabled";
};
&usbdp_phy_dp {
status = "disabled";
};
&u2phy1 {
status = "disabled";
};
&u2phy1_otg {
status = "disabled";
};
&usb_drd1_dwc3 {
status = "disabled";
};
&vcc5v0_host {
status = "disabled";
};
&vp0 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
1 << ROCKCHIP_VOP2_ESMART2)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
};
&vp1 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 |
1 << ROCKCHIP_VOP2_ESMART3)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
};
&vp2 {
/delete-property/ rockchip,plane-mask;
/delete-property/ rockchip,primary-plane;
status = "disabled";
};
/* GPIO Connector */
&spi0 {
status = "disabled";
spidev0: spidev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <10000000>;
status = "disabled";
};
};
&sai1 {
status = "disabled";
};
&uart6 {
status = "okay";
};

3
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3588-nanopi6-common.dtsi
Unescape View File

@ -484,7 +484,8 @@
<0xf1 KEY_VOLUMEDOWN>,
<0xf3 KEY_VOLUMEUP>,
<0xae KEY_MENU>,
<0xeb KEY_LEFTMETA>,
<0xeb KEY_RIGHTMETA>,
<0xcc 204>,
<0xaf KEY_BACK>,
<0xf7 KEY_MODE>,
<0xe5 KEY_SYSRQ>,

7
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3588-nanopi6-rev0a.dts
Unescape View File

@ -360,6 +360,13 @@ dsi1_pwm: &pwm11 {
status = "okay";
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
role-switch-default-mode = "host";
role-switch-visible;
usb-role-switch;
};
&vp0 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
1 << ROCKCHIP_VOP2_CLUSTER1)>;

11
kernel-6.1/arch/arm64/configs/nanopi5_android_defconfig
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@ -277,10 +277,16 @@ CONFIG_BT_BNEP=y
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=y
CONFIG_BT_HS=y
CONFIG_BT_MSFTEXT=y
CONFIG_BT_AOSPEXT=y
CONFIG_BT_HCIBTUSB=y
CONFIG_BT_HCIBTUSB_MTK=y
CONFIG_BT_HCIUART=y
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_BCSP=y
CONFIG_BT_HCIUART_ATH3K=y
CONFIG_BT_HCIUART_BCM=y
CONFIG_BT_HCIUART_RTL=y
CONFIG_RFKILL=y
CONFIG_RFKILL_RK=y
CONFIG_PCI=y
@ -495,6 +501,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=15
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_ROCKCHIP=y
# CONFIG_DEVMEM is not set

11
kernel-6.1/arch/arm64/configs/nanopi6_android_defconfig
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@ -277,10 +277,16 @@ CONFIG_BT_BNEP=y
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=y
CONFIG_BT_HS=y
CONFIG_BT_MSFTEXT=y
CONFIG_BT_AOSPEXT=y
CONFIG_BT_HCIBTUSB=y
CONFIG_BT_HCIBTUSB_MTK=y
CONFIG_BT_HCIUART=y
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_BCSP=y
CONFIG_BT_HCIUART_ATH3K=y
CONFIG_BT_HCIUART_BCM=y
CONFIG_BT_HCIUART_RTL=y
CONFIG_RFKILL=y
CONFIG_RFKILL_RK=y
CONFIG_PCI=y
@ -495,6 +501,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=10
CONFIG_SERIAL_8250_RUNTIME_UARTS=10
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_ROCKCHIP=y
# CONFIG_DEVMEM is not set

8
kernel-6.1/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
Unescape View File

@ -1043,12 +1043,19 @@ static int rk3576_combphy_cfg(struct rockchip_combphy_priv *priv)
/* Set tx_rterm = 50 ohm and rx_rterm = 43.5 ohm */
writel(0x8F, priv->mmio + (0x06 << 2));
/* Invert RX output data polarity (TBC) */
rockchip_combphy_updatel(priv, GENMASK(4, 4), BIT(4), 0x4c);
rockchip_combphy_param_write(priv->phy_grf, &cfg->con0_for_sata, true);
rockchip_combphy_param_write(priv->phy_grf, &cfg->con1_for_sata, true);
rockchip_combphy_param_write(priv->phy_grf, &cfg->con2_for_sata, true);
rockchip_combphy_param_write(priv->phy_grf, &cfg->con3_for_sata, true);
rockchip_combphy_param_write(priv->pipe_grf, &cfg->pipe_con0_for_sata, true);
rockchip_combphy_param_write(priv->pipe_grf, &cfg->pipe_con1_for_sata, true);
if (device_property_read_bool(priv->dev, "rockchip,ebuff-mode"))
rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_ebuff_mode, true);
break;
default:
dev_err(priv->dev, "incompatible PHY type\n");
@ -1153,6 +1160,7 @@ static const struct rockchip_combphy_grfcfg rk3576_combphy_grfcfgs = {
/* pipe-phy-grf */
.pcie_mode_set = { 0x0000, 5, 0, 0x00, 0x11 },
.usb_mode_set = { 0x0000, 5, 0, 0x00, 0x04 },
.pipe_ebuff_mode = { 0x0000, 10, 10, 0x00, 0x01 },
.pipe_rxterm_set = { 0x0000, 12, 12, 0x00, 0x01 },
.pipe_txelec_set = { 0x0004, 1, 1, 0x00, 0x01 },
.pipe_txcomp_set = { 0x0004, 4, 4, 0x00, 0x01 },

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