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[kernel] merge commit '0e5f3111c7..106674b4f3'

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Signed-off-by: hmz007 <hmz007@gmail.com>
master
hmz007 9 months ago
parent e09eee9541
commit c48d4e808f
10 changed files with 1442 additions and 46 deletions
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362
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3576-nanopi5-mipi-lcd-yx70.dtsi
Unescape View File

@ -0,0 +1,362 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*/
#define HAS_PWM_BACKLIGHT 1
&pwm_backlight {
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
#if defined(ENABLE_MIPI_DSI0)
&dsi {
dsi0_panel: panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&pwm_backlight>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst0_gpio>;
power-supply = <&vcc3v3_lcd_n>;
panel-name = "yx70,216dpi";
nvmems = <&dsi0_i2c 0x50 0xe0 0x10>;
nvmem-status = <1>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <67>;
prepare-delay-ms = <0>;
unprepare-delay-ms = <10>;
disable-delay-ms = <5>;
width-mm = <94>;
height-mm = <151>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 FF 98 81 03
15 00 02 01 00
15 00 02 02 00
15 00 02 03 53
15 00 02 04 53
15 00 02 05 13
15 00 02 06 04
15 00 02 07 02
15 00 02 08 02
15 00 02 09 00
15 00 02 0A 00
15 00 02 0B 00
15 00 02 0C 00
15 00 02 0D 00
15 00 02 0E 00
15 00 02 0F 00
15 00 02 10 00
15 00 02 11 00
15 00 02 12 00
15 00 02 13 00
15 00 02 14 00
15 00 02 15 00
15 00 02 16 00
15 00 02 17 00
15 00 02 18 00
15 00 02 19 00
15 00 02 1A 00
15 00 02 1B 00
15 00 02 1C 00
15 00 02 1D 00
15 00 02 1E C0
15 00 02 1F 80
15 00 02 20 02
15 00 02 21 09
15 00 02 22 00
15 00 02 23 00
15 00 02 24 00
15 00 02 25 00
15 00 02 26 00
15 00 02 27 00
15 00 02 28 55
15 00 02 29 03
15 00 02 2A 00
15 00 02 2B 00
15 00 02 2C 00
15 00 02 2D 00
15 00 02 2E 00
15 00 02 2F 00
15 00 02 30 00
15 00 02 31 00
15 00 02 32 00
15 00 02 33 00
15 00 02 34 00
15 00 02 35 00
15 00 02 36 00
15 00 02 37 00
15 00 02 38 3C
15 00 02 39 00
15 00 02 3A 00
15 00 02 3B 00
15 00 02 3C 00
15 00 02 3D 00
15 00 02 3E 00
15 00 02 3F 00
15 00 02 40 00
15 00 02 41 00
15 00 02 42 00
15 00 02 43 00
15 00 02 44 00
15 00 02 50 01
15 00 02 51 23
15 00 02 52 45
15 00 02 53 67
15 00 02 54 89
15 00 02 55 AB
15 00 02 56 01
15 00 02 57 23
15 00 02 58 45
15 00 02 59 67
15 00 02 5A 89
15 00 02 5B AB
15 00 02 5C CD
15 00 02 5D EF
15 00 02 5E 01
15 00 02 5F 02
15 00 02 60 02
15 00 02 61 08
15 00 02 62 02
15 00 02 63 02
15 00 02 64 0A
15 00 02 65 15
15 00 02 66 14
15 00 02 67 11
15 00 02 68 10
15 00 02 69 0F
15 00 02 6A 0E
15 00 02 6B 0D
15 00 02 6C 0C
15 00 02 6D 06
15 00 02 6E 02
15 00 02 6F 02
15 00 02 70 02
15 00 02 71 02
15 00 02 72 02
15 00 02 73 02
15 00 02 74 02
15 00 02 75 02
15 00 02 76 02
15 00 02 77 06
15 00 02 78 02
15 00 02 79 02
15 00 02 7A 0A
15 00 02 7B 15
15 00 02 7C 14
15 00 02 7D 10
15 00 02 7E 11
15 00 02 7F 0C
15 00 02 80 0D
15 00 02 81 0E
15 00 02 82 0F
15 00 02 83 08
15 00 02 84 02
15 00 02 85 02
15 00 02 86 02
15 00 02 87 02
15 00 02 88 02
15 00 02 89 02
15 00 02 8A 02
39 00 04 FF 98 81 04
15 00 02 6C 15
15 00 02 6E 30
15 00 02 6F 37
15 00 02 8D 1F
15 00 02 87 BA
15 00 02 26 76
15 00 02 B2 D1
15 00 02 B5 07
15 00 02 35 17
15 00 02 33 14
15 00 02 31 75
15 00 02 3A 85
15 00 02 3B 98
15 00 02 38 01
15 00 02 39 00
39 00 04 FF 98 81 01
15 00 02 22 0A
15 00 02 31 00
15 00 02 50 E9
15 00 02 51 E4
15 00 02 53 58
15 00 02 55 64
15 00 02 60 28
15 00 02 2E C8
15 00 02 34 01
15 00 02 A0 00
15 00 02 A1 13
15 00 02 A2 24
15 00 02 A3 15
15 00 02 A4 18
15 00 02 A5 2F
15 00 02 A6 22
15 00 02 A7 21
15 00 02 A8 89
15 00 02 A9 1B
15 00 02 AA 27
15 00 02 AB 7D
15 00 02 AC 1B
15 00 02 AD 1B
15 00 02 AE 50
15 00 02 AF 24
15 00 02 B0 2A
15 00 02 B1 51
15 00 02 B2 5A
15 00 02 B3 1B
15 00 02 C0 00
15 00 02 C1 16
15 00 02 C2 24
15 00 02 C3 13
15 00 02 C4 18
15 00 02 C5 2A
15 00 02 C6 20
15 00 02 C7 22
15 00 02 C8 80
15 00 02 C9 1C
15 00 02 CA 28
15 00 02 CB 71
15 00 02 CC 1D
15 00 02 CD 1B
15 00 02 CE 51
15 00 02 CF 24
15 00 02 D0 2A
15 00 02 D1 4C
15 00 02 D2 5A
15 00 02 D3 32
39 00 04 FF 98 81 02
15 00 02 04 17
15 00 02 05 12
15 00 02 06 40
15 00 02 07 0B
39 00 04 FF 98 81 00
05 78 01 11
05 1E 01 29
];
panel-exit-sequence = [
15 00 02 28 00
15 3C 02 10 00
];
disp_timings0: display-timings {
native-mode = <&dsi_timing0>;
dsi_timing0: timing0 {
clock-frequency = <71820000>;
hactive = <800>;
vactive = <1280>;
hfront-porch = <40>;
hsync-len = <20>;
hback-porch = <40>;
vfront-porch = <20>;
vsync-len = <10>;
vback-porch = <20>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi0: endpoint {
remote-endpoint = <&dsi0_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi0_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi0>;
};
};
};
};
&dsi0_i2c {
dsi0_gt1x: gt1x@14 {
compatible = "goodix,gt1x";
reg = <0x14>;
pinctrl-names = "default";
pinctrl-0 = <&touch_dsi0_gpio>;
goodix,irq-gpio = <&gpio0 RK_PD0 IRQ_TYPE_LEVEL_LOW>;
goodix,rst-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
keep-otp-config;
};
dsi0_gt9xx: gt9xx@5d {
compatible = "goodix,gt9xx";
reg = <0x5d>;
pinctrl-names = "default";
pinctrl-0 = <&touch_dsi0_gpio>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PD0 IRQ_TYPE_EDGE_FALLING>;
goodix,irq-gpio = <&gpio0 RK_PD0 IRQ_TYPE_LEVEL_LOW>;
goodix,rst-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
keep-otp-config;
status = "disabled";
};
dsi0_e2prom: eeprom@50 {
compatible = "microchip,24c02", "atmel,24c02";
reg = <0x50>;
#address-cells = <2>;
#size-cells = <0>;
pagesize = <16>;
size = <256>;
};
};
#endif

4
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3576-nanopi5-rev01.dts
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@ -243,7 +243,7 @@
};
/* MIPI-DSI */
#define ENABLE_MIPI_DSI0 0
#define ENABLE_MIPI_DSI0 1
#if (ENABLE_MIPI_DSI0)
dsi0_i2c: &i2c8 {
@ -272,7 +272,7 @@ dsi0_pwm: &pwm1_6ch_0 {
connect = <&vp1_out_dsi>;
};
#include "rk3576-nanopi5-mipi-evb-v10.dtsi"
#include "rk3576-nanopi5-mipi-lcd-yx70.dtsi"
#endif
/* GPIO Connector */

672
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3588-nanopi6-mipi-lcd-yx70.dtsi
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@ -0,0 +1,672 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*/
#define HAS_PWM_BACKLIGHT 1
&pwm_backlight {
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
#if defined(ENABLE_MIPI_DSI0)
&dsi0 {
dsi0_panel: panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&pwm_backlight>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst0_gpio>;
reset-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
panel-name = "yx70,216dpi";
nvmems = <&dsi0_i2c 0x50 0xe0 0x10>;
nvmem-status = <1>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <67>;
prepare-delay-ms = <0>;
unprepare-delay-ms = <10>;
disable-delay-ms = <5>;
width-mm = <94>;
height-mm = <151>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 FF 98 81 03
15 00 02 01 00
15 00 02 02 00
15 00 02 03 53
15 00 02 04 53
15 00 02 05 13
15 00 02 06 04
15 00 02 07 02
15 00 02 08 02
15 00 02 09 00
15 00 02 0A 00
15 00 02 0B 00
15 00 02 0C 00
15 00 02 0D 00
15 00 02 0E 00
15 00 02 0F 00
15 00 02 10 00
15 00 02 11 00
15 00 02 12 00
15 00 02 13 00
15 00 02 14 00
15 00 02 15 00
15 00 02 16 00
15 00 02 17 00
15 00 02 18 00
15 00 02 19 00
15 00 02 1A 00
15 00 02 1B 00
15 00 02 1C 00
15 00 02 1D 00
15 00 02 1E C0
15 00 02 1F 80
15 00 02 20 02
15 00 02 21 09
15 00 02 22 00
15 00 02 23 00
15 00 02 24 00
15 00 02 25 00
15 00 02 26 00
15 00 02 27 00
15 00 02 28 55
15 00 02 29 03
15 00 02 2A 00
15 00 02 2B 00
15 00 02 2C 00
15 00 02 2D 00
15 00 02 2E 00
15 00 02 2F 00
15 00 02 30 00
15 00 02 31 00
15 00 02 32 00
15 00 02 33 00
15 00 02 34 00
15 00 02 35 00
15 00 02 36 00
15 00 02 37 00
15 00 02 38 3C
15 00 02 39 00
15 00 02 3A 00
15 00 02 3B 00
15 00 02 3C 00
15 00 02 3D 00
15 00 02 3E 00
15 00 02 3F 00
15 00 02 40 00
15 00 02 41 00
15 00 02 42 00
15 00 02 43 00
15 00 02 44 00
15 00 02 50 01
15 00 02 51 23
15 00 02 52 45
15 00 02 53 67
15 00 02 54 89
15 00 02 55 AB
15 00 02 56 01
15 00 02 57 23
15 00 02 58 45
15 00 02 59 67
15 00 02 5A 89
15 00 02 5B AB
15 00 02 5C CD
15 00 02 5D EF
15 00 02 5E 01
15 00 02 5F 02
15 00 02 60 02
15 00 02 61 08
15 00 02 62 02
15 00 02 63 02
15 00 02 64 0A
15 00 02 65 15
15 00 02 66 14
15 00 02 67 11
15 00 02 68 10
15 00 02 69 0F
15 00 02 6A 0E
15 00 02 6B 0D
15 00 02 6C 0C
15 00 02 6D 06
15 00 02 6E 02
15 00 02 6F 02
15 00 02 70 02
15 00 02 71 02
15 00 02 72 02
15 00 02 73 02
15 00 02 74 02
15 00 02 75 02
15 00 02 76 02
15 00 02 77 06
15 00 02 78 02
15 00 02 79 02
15 00 02 7A 0A
15 00 02 7B 15
15 00 02 7C 14
15 00 02 7D 10
15 00 02 7E 11
15 00 02 7F 0C
15 00 02 80 0D
15 00 02 81 0E
15 00 02 82 0F
15 00 02 83 08
15 00 02 84 02
15 00 02 85 02
15 00 02 86 02
15 00 02 87 02
15 00 02 88 02
15 00 02 89 02
15 00 02 8A 02
39 00 04 FF 98 81 04
15 00 02 6C 15
15 00 02 6E 30
15 00 02 6F 37
15 00 02 8D 1F
15 00 02 87 BA
15 00 02 26 76
15 00 02 B2 D1
15 00 02 B5 07
15 00 02 35 17
15 00 02 33 14
15 00 02 31 75
15 00 02 3A 85
15 00 02 3B 98
15 00 02 38 01
15 00 02 39 00
39 00 04 FF 98 81 01
15 00 02 22 0A
15 00 02 31 00
15 00 02 50 E9
15 00 02 51 E4
15 00 02 53 58
15 00 02 55 64
15 00 02 60 28
15 00 02 2E C8
15 00 02 34 01
15 00 02 A0 00
15 00 02 A1 13
15 00 02 A2 24
15 00 02 A3 15
15 00 02 A4 18
15 00 02 A5 2F
15 00 02 A6 22
15 00 02 A7 21
15 00 02 A8 89
15 00 02 A9 1B
15 00 02 AA 27
15 00 02 AB 7D
15 00 02 AC 1B
15 00 02 AD 1B
15 00 02 AE 50
15 00 02 AF 24
15 00 02 B0 2A
15 00 02 B1 51
15 00 02 B2 5A
15 00 02 B3 1B
15 00 02 C0 00
15 00 02 C1 16
15 00 02 C2 24
15 00 02 C3 13
15 00 02 C4 18
15 00 02 C5 2A
15 00 02 C6 20
15 00 02 C7 22
15 00 02 C8 80
15 00 02 C9 1C
15 00 02 CA 28
15 00 02 CB 71
15 00 02 CC 1D
15 00 02 CD 1B
15 00 02 CE 51
15 00 02 CF 24
15 00 02 D0 2A
15 00 02 D1 4C
15 00 02 D2 5A
15 00 02 D3 32
39 00 04 FF 98 81 02
15 00 02 04 17
15 00 02 05 12
15 00 02 06 40
15 00 02 07 0B
39 00 04 FF 98 81 00
05 78 01 11
05 1E 01 29
];
panel-exit-sequence = [
15 00 02 28 00
15 3C 02 10 00
];
disp_timings0: display-timings {
native-mode = <&dsi_timing0>;
dsi_timing0: timing0 {
clock-frequency = <71820000>;
hactive = <800>;
vactive = <1280>;
hfront-porch = <40>;
hsync-len = <20>;
hback-porch = <40>;
vfront-porch = <20>;
vsync-len = <10>;
vback-porch = <20>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi0: endpoint {
remote-endpoint = <&dsi0_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi0_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi0>;
};
};
};
};
&dsi0_i2c {
dsi0_gt1x: gt1x@14 {
compatible = "goodix,gt1x";
reg = <0x14>;
pinctrl-names = "default";
pinctrl-0 = <&touch_dsi0_gpio>;
goodix,irq-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_LOW>;
goodix,rst-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
keep-otp-config;
status = "disabled";
};
dsi0_gt9xx: gt9xx@5d {
compatible = "goodix,gt9xx";
reg = <0x5d>;
pinctrl-names = "default";
pinctrl-0 = <&touch_dsi0_gpio>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PC0 IRQ_TYPE_EDGE_FALLING>;
goodix,irq-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_LOW>;
goodix,rst-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
keep-otp-config;
status = "disabled";
};
};
#endif
#if defined(ENABLE_MIPI_DSI1)
&dsi1 {
dsi1_panel: panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&pwm_backlight>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst1_gpio>;
reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
panel-name = "yx70,216dpi";
nvmems = <&dsi1_i2c 0x50 0xe0 0x10>;
nvmem-status = <1>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <67>;
prepare-delay-ms = <0>;
unprepare-delay-ms = <10>;
disable-delay-ms = <5>;
width-mm = <94>;
height-mm = <151>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 FF 98 81 03
15 00 02 01 00
15 00 02 02 00
15 00 02 03 53
15 00 02 04 53
15 00 02 05 13
15 00 02 06 04
15 00 02 07 02
15 00 02 08 02
15 00 02 09 00
15 00 02 0A 00
15 00 02 0B 00
15 00 02 0C 00
15 00 02 0D 00
15 00 02 0E 00
15 00 02 0F 00
15 00 02 10 00
15 00 02 11 00
15 00 02 12 00
15 00 02 13 00
15 00 02 14 00
15 00 02 15 00
15 00 02 16 00
15 00 02 17 00
15 00 02 18 00
15 00 02 19 00
15 00 02 1A 00
15 00 02 1B 00
15 00 02 1C 00
15 00 02 1D 00
15 00 02 1E C0
15 00 02 1F 80
15 00 02 20 02
15 00 02 21 09
15 00 02 22 00
15 00 02 23 00
15 00 02 24 00
15 00 02 25 00
15 00 02 26 00
15 00 02 27 00
15 00 02 28 55
15 00 02 29 03
15 00 02 2A 00
15 00 02 2B 00
15 00 02 2C 00
15 00 02 2D 00
15 00 02 2E 00
15 00 02 2F 00
15 00 02 30 00
15 00 02 31 00
15 00 02 32 00
15 00 02 33 00
15 00 02 34 00
15 00 02 35 00
15 00 02 36 00
15 00 02 37 00
15 00 02 38 3C
15 00 02 39 00
15 00 02 3A 00
15 00 02 3B 00
15 00 02 3C 00
15 00 02 3D 00
15 00 02 3E 00
15 00 02 3F 00
15 00 02 40 00
15 00 02 41 00
15 00 02 42 00
15 00 02 43 00
15 00 02 44 00
15 00 02 50 01
15 00 02 51 23
15 00 02 52 45
15 00 02 53 67
15 00 02 54 89
15 00 02 55 AB
15 00 02 56 01
15 00 02 57 23
15 00 02 58 45
15 00 02 59 67
15 00 02 5A 89
15 00 02 5B AB
15 00 02 5C CD
15 00 02 5D EF
15 00 02 5E 01
15 00 02 5F 02
15 00 02 60 02
15 00 02 61 08
15 00 02 62 02
15 00 02 63 02
15 00 02 64 0A
15 00 02 65 15
15 00 02 66 14
15 00 02 67 11
15 00 02 68 10
15 00 02 69 0F
15 00 02 6A 0E
15 00 02 6B 0D
15 00 02 6C 0C
15 00 02 6D 06
15 00 02 6E 02
15 00 02 6F 02
15 00 02 70 02
15 00 02 71 02
15 00 02 72 02
15 00 02 73 02
15 00 02 74 02
15 00 02 75 02
15 00 02 76 02
15 00 02 77 06
15 00 02 78 02
15 00 02 79 02
15 00 02 7A 0A
15 00 02 7B 15
15 00 02 7C 14
15 00 02 7D 10
15 00 02 7E 11
15 00 02 7F 0C
15 00 02 80 0D
15 00 02 81 0E
15 00 02 82 0F
15 00 02 83 08
15 00 02 84 02
15 00 02 85 02
15 00 02 86 02
15 00 02 87 02
15 00 02 88 02
15 00 02 89 02
15 00 02 8A 02
39 00 04 FF 98 81 04
15 00 02 6C 15
15 00 02 6E 30
15 00 02 6F 37
15 00 02 8D 1F
15 00 02 87 BA
15 00 02 26 76
15 00 02 B2 D1
15 00 02 B5 07
15 00 02 35 17
15 00 02 33 14
15 00 02 31 75
15 00 02 3A 85
15 00 02 3B 98
15 00 02 38 01
15 00 02 39 00
39 00 04 FF 98 81 01
15 00 02 22 0A
15 00 02 31 00
15 00 02 50 E9
15 00 02 51 E4
15 00 02 53 58
15 00 02 55 64
15 00 02 60 28
15 00 02 2E C8
15 00 02 34 01
15 00 02 A0 00
15 00 02 A1 13
15 00 02 A2 24
15 00 02 A3 15
15 00 02 A4 18
15 00 02 A5 2F
15 00 02 A6 22
15 00 02 A7 21
15 00 02 A8 89
15 00 02 A9 1B
15 00 02 AA 27
15 00 02 AB 7D
15 00 02 AC 1B
15 00 02 AD 1B
15 00 02 AE 50
15 00 02 AF 24
15 00 02 B0 2A
15 00 02 B1 51
15 00 02 B2 5A
15 00 02 B3 1B
15 00 02 C0 00
15 00 02 C1 16
15 00 02 C2 24
15 00 02 C3 13
15 00 02 C4 18
15 00 02 C5 2A
15 00 02 C6 20
15 00 02 C7 22
15 00 02 C8 80
15 00 02 C9 1C
15 00 02 CA 28
15 00 02 CB 71
15 00 02 CC 1D
15 00 02 CD 1B
15 00 02 CE 51
15 00 02 CF 24
15 00 02 D0 2A
15 00 02 D1 4C
15 00 02 D2 5A
15 00 02 D3 32
39 00 04 FF 98 81 02
15 00 02 04 17
15 00 02 05 12
15 00 02 06 40
15 00 02 07 0B
39 00 04 FF 98 81 00
05 78 01 11
05 1E 01 29
];
panel-exit-sequence = [
15 00 02 28 00
15 3C 02 10 00
];
display-timings {
native-mode = <&dsi1_timing0>;
dsi1_timing0: timing0 {
clock-frequency = <71820000>;
hactive = <800>;
vactive = <1280>;
hfront-porch = <40>;
hsync-len = <20>;
hback-porch = <40>;
vfront-porch = <20>;
vsync-len = <10>;
vback-porch = <20>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&dsi1_i2c {
dsi1_gt1x: gt1x@14 {
compatible = "goodix,gt1x";
reg = <0x14>;
pinctrl-names = "default";
pinctrl-0 = <&touch_dsi1_gpio>;
goodix,irq-gpio = <&gpio4 RK_PA0 IRQ_TYPE_EDGE_FALLING>;
goodix,rst-gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
keep-otp-config;
status = "disabled";
};
dsi1_gt9xx: gt9xx@5d {
compatible = "goodix,gt9xx";
reg = <0x5d>;
pinctrl-names = "default";
pinctrl-0 = <&touch_dsi1_gpio>;
interrupt-parent = <&gpio4>;
interrupts = <RK_PA0 IRQ_TYPE_EDGE_FALLING>;
goodix,irq-gpio = <&gpio4 RK_PA0 IRQ_TYPE_EDGE_FALLING>;
goodix,rst-gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
keep-otp-config;
status = "disabled";
};
dsi1_e2prom: eeprom@50 {
compatible = "microchip,24c02", "atmel,24c02";
reg = <0x50>;
#address-cells = <2>;
#size-cells = <0>;
pagesize = <16>;
size = <256>;
};
};
#endif

32
kernel-6.1/arch/arm64/boot/dts/rockchip/rk3588-nanopi6-rev01.dts
Unescape View File

@ -198,7 +198,7 @@
};
&dp0_in_vp1 {
status = "disabled";
status = "okay";
};
&dp0_in_vp2 {
@ -720,6 +720,36 @@ dsi1_pwm: &pwm11 {
status = "disabled";
};
/* MIPI-DSI */
#define ENABLE_MIPI_DSI1 1
#include "rk3588-nanopi6-mipi-lcd-yx70.dtsi"
#include "rk3588-nanopi6-mipi-dsi-sel.dtsi"
#if defined(ENABLE_MIPI_DSI0)
&dsi0_gt1x {
compatible = "goodix,gt1x", "goodix,gt9xx";
status = "okay";
};
&dsi0_gt9xx {
status = "disabled";
};
#endif
#if defined(ENABLE_MIPI_DSI1)
&dsi1_gt1x {
compatible = "goodix,gt1x", "goodix,gt9xx";
status = "okay";
};
&dsi1_gt9xx {
status = "disabled";
};
#endif
#undef ENABLE_MIPI_DSI1
/* GPIO Connector */
&pwm5 {
pinctrl-0 = <&pwm5m1_pins>;

2
kernel-6.1/arch/arm64/configs/nanopi5_android_defconfig
Unescape View File

@ -280,7 +280,7 @@ CONFIG_BT_HIDP=y
CONFIG_BT_HS=y
CONFIG_BT_MSFTEXT=y
CONFIG_BT_AOSPEXT=y
CONFIG_BT_HCIBTUSB=y
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIBTUSB_MTK=y
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_BCSP=y

2
kernel-6.1/arch/arm64/configs/nanopi6_android_defconfig
Unescape View File

@ -280,7 +280,7 @@ CONFIG_BT_HIDP=y
CONFIG_BT_HS=y
CONFIG_BT_MSFTEXT=y
CONFIG_BT_AOSPEXT=y
CONFIG_BT_HCIBTUSB=y
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIBTUSB_MTK=y
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_BCSP=y

350
kernel-6.1/drivers/bluetooth/btrtl.c
Unescape View File

@ -21,6 +21,7 @@
#define RTL_CHIP_8723CS_VF 4
#define RTL_CHIP_8723CS_XX 5
#define RTL_EPATCH_SIGNATURE "Realtech"
#define RTL_EPATCH_SIGNATURE_V2 "RTBTCore"
#define RTL_ROM_LMP_8703B 0x8703
#define RTL_ROM_LMP_8723A 0x1200
#define RTL_ROM_LMP_8723B 0x8723
@ -44,6 +45,14 @@
.hci_ver = (hciv), \
.hci_bus = (bus)
#define RTL_CHIP_SUBVER (&(struct rtl_vendor_cmd) {{0x10, 0x38, 0x04, 0x28, 0x80}})
#define RTL_CHIP_REV (&(struct rtl_vendor_cmd) {{0x10, 0x3A, 0x04, 0x28, 0x80}})
#define RTL_SEC_PROJ (&(struct rtl_vendor_cmd) {{0x10, 0xA4, 0x0D, 0x00, 0xb0}})
#define RTL_PATCH_SNIPPETS 0x01
#define RTL_PATCH_DUMMY_HEADER 0x02
#define RTL_PATCH_SECURITY_HEADER 0x03
enum btrtl_chip_id {
CHIP_ID_8723A,
CHIP_ID_8723B,
@ -83,6 +92,8 @@ struct btrtl_device_info {
int cfg_len;
bool drop_fw;
int project_id;
u8 key_id;
struct list_head patch_subsecs;
};
static const struct id_table ic_id_table[] = {
@ -337,6 +348,227 @@ static int rtl_read_rom_version(struct hci_dev *hdev, u8 *version)
return 0;
}
static int btrtl_vendor_read_reg16(struct hci_dev *hdev,
struct rtl_vendor_cmd *cmd, u8 *rp)
{
struct sk_buff *skb;
int err = 0;
skb = __hci_cmd_sync(hdev, 0xfc61, sizeof(*cmd), cmd,
HCI_INIT_TIMEOUT);
if (IS_ERR(skb)) {
err = PTR_ERR(skb);
rtl_dev_err(hdev, "RTL: Read reg16 failed (%d)", err);
return err;
}
if (skb->len != 3 || skb->data[0]) {
bt_dev_err(hdev, "RTL: Read reg16 length mismatch");
kfree_skb(skb);
return -EIO;
}
if (rp)
memcpy(rp, skb->data + 1, 2);
kfree_skb(skb);
return 0;
}
static void *rtl_iov_pull_data(struct rtl_iovec *iov, u32 len)
{
void *data = iov->data;
if (iov->len < len)
return NULL;
iov->data += len;
iov->len -= len;
return data;
}
static void btrtl_insert_ordered_subsec(struct rtl_subsection *node,
struct btrtl_device_info *btrtl_dev)
{
struct list_head *pos;
struct list_head *next;
struct rtl_subsection *subsec;
list_for_each_safe(pos, next, &btrtl_dev->patch_subsecs) {
subsec = list_entry(pos, struct rtl_subsection, list);
if (subsec->prio >= node->prio)
break;
}
__list_add(&node->list, pos->prev, pos);
}
static int btrtl_parse_section(struct hci_dev *hdev,
struct btrtl_device_info *btrtl_dev, u32 opcode,
u8 *data, u32 len)
{
struct rtl_section_hdr *hdr;
struct rtl_subsection *subsec;
struct rtl_common_subsec *common_subsec;
struct rtl_sec_hdr *sec_hdr;
int i;
u8 *ptr;
u16 num_subsecs;
u32 subsec_len;
int rc = 0;
struct rtl_iovec iov = {
.data = data,
.len = len,
};
hdr = rtl_iov_pull_data(&iov, sizeof(*hdr));
if (!hdr)
return -EINVAL;
num_subsecs = le16_to_cpu(hdr->num);
for (i = 0; i < num_subsecs; i++) {
common_subsec = rtl_iov_pull_data(&iov, sizeof(*common_subsec));
if (!common_subsec)
break;
subsec_len = le32_to_cpu(common_subsec->len);
rtl_dev_dbg(hdev, "subsec, eco 0x%02x, len %08x",
common_subsec->eco, subsec_len);
ptr = rtl_iov_pull_data(&iov, subsec_len);
if (!ptr)
break;
if (common_subsec->eco != btrtl_dev->rom_version + 1)
continue;
switch (opcode) {
case RTL_PATCH_SECURITY_HEADER:
sec_hdr = (void *)common_subsec;
if (sec_hdr->key_id != btrtl_dev->key_id)
continue;
break;
}
subsec = kzalloc(sizeof(*subsec), GFP_KERNEL);
if (!subsec)
return -ENOMEM;
subsec->opcode = opcode;
subsec->prio = common_subsec->prio;
subsec->len = subsec_len;
subsec->data = ptr;
btrtl_insert_ordered_subsec(subsec, btrtl_dev);
rc += subsec_len;
}
return rc;
}
static int rtlbt_parse_firmware_v2(struct hci_dev *hdev,
struct btrtl_device_info *btrtl_dev,
unsigned char **_buf)
{
struct rtl_epatch_header_v2 *hdr;
int rc;
u8 reg_val[2];
u8 key_id;
u32 num_sections;
struct rtl_section *section;
struct rtl_subsection *entry, *tmp;
u32 section_len;
u32 opcode;
int len = 0;
int i;
u8 *ptr;
struct rtl_iovec iov = {
.data = btrtl_dev->fw_data,
.len = btrtl_dev->fw_len - 7, /* Cut the tail */
};
rc = btrtl_vendor_read_reg16(hdev, RTL_SEC_PROJ, reg_val);
if (rc < 0)
return -EIO;
key_id = reg_val[0];
rtl_dev_dbg(hdev, "%s: key id %u", __func__, key_id);
btrtl_dev->key_id = key_id;
hdr = rtl_iov_pull_data(&iov, sizeof(*hdr));
if (!hdr)
return -EINVAL;
num_sections = le32_to_cpu(hdr->num_sections);
rtl_dev_dbg(hdev, "FW version %08x-%08x", *((u32 *)hdr->fw_version),
*((u32 *)(hdr->fw_version + 4)));
for (i = 0; i < num_sections; i++) {
section = rtl_iov_pull_data(&iov, sizeof(*section));
if (!section)
break;
section_len = le32_to_cpu(section->len);
opcode = le32_to_cpu(section->opcode);
rtl_dev_dbg(hdev, "opcode 0x%04x", section->opcode);
ptr = rtl_iov_pull_data(&iov, section_len);
if (!ptr)
break;
switch (opcode) {
case RTL_PATCH_SNIPPETS:
rc = btrtl_parse_section(hdev, btrtl_dev, opcode,
ptr, section_len);
break;
case RTL_PATCH_SECURITY_HEADER:
/* If key_id from chip is zero, ignore all security
* headers.
*/
if (!key_id)
break;
rc = btrtl_parse_section(hdev, btrtl_dev, opcode,
ptr, section_len);
break;
case RTL_PATCH_DUMMY_HEADER:
rc = btrtl_parse_section(hdev, btrtl_dev, opcode,
ptr, section_len);
break;
default:
rc = 0;
break;
}
if (rc < 0) {
rtl_dev_err(hdev, "RTL: Parse section (%u) err %d",
opcode, rc);
return rc;
}
len += rc;
}
if (!len)
return -ENODATA;
/* Allocate mem and copy all found subsecs. */
ptr = kvmalloc(len, GFP_KERNEL);
if (!ptr)
return -ENOMEM;
len = 0;
list_for_each_entry_safe(entry, tmp, &btrtl_dev->patch_subsecs, list) {
rtl_dev_dbg(hdev, "RTL: opcode %08x, addr %p, len 0x%x",
entry->opcode, entry->data, entry->len);
memcpy(ptr + len, entry->data, entry->len);
len += entry->len;
}
if (!len)
return -EPERM;
*_buf = ptr;
return len;
}
static int rtlbt_parse_firmware(struct hci_dev *hdev,
struct btrtl_device_info *btrtl_dev,
unsigned char **_buf)
@ -372,7 +604,18 @@ static int rtlbt_parse_firmware(struct hci_dev *hdev,
{ RTL_ROM_LMP_8851B, 36 }, /* 8851B */
};
min_size = sizeof(struct rtl_epatch_header) + sizeof(extension_sig) + 3;
if (btrtl_dev->fw_len <= 8)
return -EINVAL;
if (!memcmp(btrtl_dev->fw_data, RTL_EPATCH_SIGNATURE, 8))
min_size = sizeof(struct rtl_epatch_header) +
sizeof(extension_sig) + 3;
else if (!memcmp(btrtl_dev->fw_data, RTL_EPATCH_SIGNATURE_V2, 8))
min_size = sizeof(struct rtl_epatch_header_v2) +
sizeof(extension_sig) + 3;
else
return -EINVAL;
if (btrtl_dev->fw_len < min_size)
return -EINVAL;
@ -437,12 +680,14 @@ static int rtlbt_parse_firmware(struct hci_dev *hdev,
return -EINVAL;
}
epatch_info = (struct rtl_epatch_header *)btrtl_dev->fw_data;
if (memcmp(epatch_info->signature, RTL_EPATCH_SIGNATURE, 8) != 0) {
if (memcmp(btrtl_dev->fw_data, RTL_EPATCH_SIGNATURE, 8) != 0) {
if (!memcmp(btrtl_dev->fw_data, RTL_EPATCH_SIGNATURE_V2, 8))
return rtlbt_parse_firmware_v2(hdev, btrtl_dev, _buf);
rtl_dev_err(hdev, "bad EPATCH signature");
return -EINVAL;
}
epatch_info = (struct rtl_epatch_header *)btrtl_dev->fw_data;
num_patches = le16_to_cpu(epatch_info->num_patches);
BT_DBG("fw_version=%x, num_patches=%d",
le32_to_cpu(epatch_info->fw_version), num_patches);
@ -506,6 +751,7 @@ static int rtl_download_firmware(struct hci_dev *hdev,
int frag_len = RTL_FRAG_LEN;
int ret = 0;
int i;
int j = 0;
struct sk_buff *skb;
struct hci_rp_read_local_version *rp;
@ -516,17 +762,16 @@ static int rtl_download_firmware(struct hci_dev *hdev,
for (i = 0; i < frag_num; i++) {
struct sk_buff *skb;
BT_DBG("download fw (%d/%d)", i, frag_num);
if (i > 0x7f)
dl_cmd->index = (i & 0x7f) + 1;
else
dl_cmd->index = i;
dl_cmd->index = j++;
if (dl_cmd->index == 0x7f)
j = 1;
if (i == (frag_num - 1)) {
dl_cmd->index |= 0x80; /* data end */
frag_len = fw_len % RTL_FRAG_LEN;
}
rtl_dev_dbg(hdev, "download fw (%d/%d). index = %d", i,
frag_num, dl_cmd->index);
memcpy(dl_cmd->data, data, frag_len);
/* Send download command */
@ -686,8 +931,16 @@ static int rtl_read_chip_type(struct hci_dev *hdev, u8 *type)
void btrtl_free(struct btrtl_device_info *btrtl_dev)
{
struct rtl_subsection *entry, *tmp;
kvfree(btrtl_dev->fw_data);
kvfree(btrtl_dev->cfg_data);
list_for_each_entry_safe(entry, tmp, &btrtl_dev->patch_subsecs, list) {
list_del(&entry->list);
kfree(entry);
}
kfree(btrtl_dev);
}
EXPORT_SYMBOL_GPL(btrtl_free);
@ -700,10 +953,11 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
struct hci_rp_read_local_version *resp;
char cfg_name[40];
u16 hci_rev, lmp_subver;
u8 hci_ver, chip_type = 0;
u8 hci_ver, lmp_ver, chip_type = 0;
int ret;
u16 opcode;
u8 cmd[2];
u8 reg_val[2];
btrtl_dev = kzalloc(sizeof(*btrtl_dev), GFP_KERNEL);
if (!btrtl_dev) {
@ -711,6 +965,31 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
goto err_alloc;
}
INIT_LIST_HEAD(&btrtl_dev->patch_subsecs);
check_version:
ret = btrtl_vendor_read_reg16(hdev, RTL_CHIP_SUBVER, reg_val);
if (ret < 0)
goto err_free;
lmp_subver = get_unaligned_le16(reg_val);
if (lmp_subver == RTL_ROM_LMP_8822B) {
ret = btrtl_vendor_read_reg16(hdev, RTL_CHIP_REV, reg_val);
if (ret < 0)
goto err_free;
hci_rev = get_unaligned_le16(reg_val);
/* 8822E */
if (hci_rev == 0x000e) {
hci_ver = 0x0c;
lmp_ver = 0x0c;
btrtl_dev->ic_info = btrtl_match_ic(lmp_subver, hci_rev,
hci_ver, hdev->bus,
chip_type);
goto next;
}
}
skb = btrtl_read_local_version(hdev);
if (IS_ERR(skb)) {
ret = PTR_ERR(skb);
@ -718,14 +997,14 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
}
resp = (struct hci_rp_read_local_version *)skb->data;
rtl_dev_info(hdev, "examining hci_ver=%02x hci_rev=%04x lmp_ver=%02x lmp_subver=%04x",
resp->hci_ver, resp->hci_rev,
resp->lmp_ver, resp->lmp_subver);
hci_ver = resp->hci_ver;
hci_rev = le16_to_cpu(resp->hci_rev);
hci_ver = resp->hci_ver;
hci_rev = le16_to_cpu(resp->hci_rev);
lmp_ver = resp->lmp_ver;
lmp_subver = le16_to_cpu(resp->lmp_subver);
kfree_skb(skb);
if (rtl_has_chip_type(lmp_subver)) {
ret = rtl_read_chip_type(hdev, &chip_type);
if (ret)
@ -735,8 +1014,15 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
btrtl_dev->ic_info = btrtl_match_ic(lmp_subver, hci_rev, hci_ver,
hdev->bus, chip_type);
if (!btrtl_dev->ic_info)
next:
rtl_dev_info(hdev, "examining hci_ver=%02x hci_rev=%04x lmp_ver=%02x lmp_subver=%04x",
hci_ver, hci_rev,
lmp_ver, lmp_subver);
if (!btrtl_dev->ic_info && !btrtl_dev->drop_fw)
btrtl_dev->drop_fw = true;
else
btrtl_dev->drop_fw = false;
if (btrtl_dev->drop_fw) {
opcode = hci_opcode_pack(0x3f, 0x66);
@ -745,41 +1031,25 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
if (!skb)
goto out_free;
goto err_free;
skb_put_data(skb, cmd, sizeof(cmd));
hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
hdev->send(hdev, skb);
ret = hdev->send(hdev, skb);
if (ret < 0) {
bt_dev_err(hdev, "sending frame failed (%d)", ret);
kfree_skb(skb);
goto err_free;
}
/* Ensure the above vendor command is sent to controller and
* process has done.
*/
msleep(200);
/* Read the local version again. Expect to have the vanilla
* version as cold boot.
*/
skb = btrtl_read_local_version(hdev);
if (IS_ERR(skb)) {
ret = PTR_ERR(skb);
goto err_free;
}
resp = (struct hci_rp_read_local_version *)skb->data;
rtl_dev_info(hdev, "examining hci_ver=%02x hci_rev=%04x lmp_ver=%02x lmp_subver=%04x",
resp->hci_ver, resp->hci_rev,
resp->lmp_ver, resp->lmp_subver);
hci_ver = resp->hci_ver;
hci_rev = le16_to_cpu(resp->hci_rev);
lmp_subver = le16_to_cpu(resp->lmp_subver);
btrtl_dev->ic_info = btrtl_match_ic(lmp_subver, hci_rev, hci_ver,
hdev->bus, chip_type);
goto check_version;
}
out_free:
kfree_skb(skb);
if (!btrtl_dev->ic_info) {
rtl_dev_info(hdev, "unknown IC info, lmp subver %04x, hci rev %04x, hci ver %04x",

53
kernel-6.1/drivers/bluetooth/btrtl.h
Unescape View File

@ -49,7 +49,58 @@ struct rtl_vendor_config_entry {
struct rtl_vendor_config {
__le32 signature;
__le16 total_len;
struct rtl_vendor_config_entry entry[];
__u8 entry[];
} __packed;
struct rtl_epatch_header_v2 {
__u8 signature[8];
__u8 fw_version[8];
__le32 num_sections;
} __packed;
struct rtl_section {
__le32 opcode;
__le32 len;
u8 data[];
} __packed;
struct rtl_section_hdr {
__le16 num;
__le16 reserved;
} __packed;
struct rtl_common_subsec {
__u8 eco;
__u8 prio;
__u8 cb[2];
__le32 len;
__u8 data[];
};
struct rtl_sec_hdr {
__u8 eco;
__u8 prio;
__u8 key_id;
__u8 reserved;
__le32 len;
__u8 data[];
} __packed;
struct rtl_subsection {
struct list_head list;
u32 opcode;
u32 len;
u8 prio;
u8 *data;
};
struct rtl_iovec {
u8 *data;
u32 len;
};
struct rtl_vendor_cmd {
__u8 param[5];
} __packed;
#if IS_ENABLED(CONFIG_BT_RTL)

3
kernel-6.1/drivers/bluetooth/btusb.c
Unescape View File

@ -256,6 +256,9 @@ static const struct usb_device_id blacklist_table[] = {
{ USB_DEVICE(0x0489, 0xe036), .driver_info = BTUSB_ATH3012 },
{ USB_DEVICE(0x0489, 0xe03c), .driver_info = BTUSB_ATH3012 },
/* MediaTek MT7961U (CF-953AX) */
{ USB_DEVICE(0x0e8d, 0x7961), .driver_info = BTUSB_IGNORE },
/* QCA ROME chipset */
{ USB_DEVICE(0x0cf3, 0x535b), .driver_info = BTUSB_QCA_ROME |
BTUSB_WIDEBAND_SPEECH },

8
kernel-6.1/net/bluetooth/hci_core.c
Unescape View File

@ -2724,7 +2724,15 @@ void hci_unregister_dev(struct hci_dev *hdev)
list_del(&hdev->list);
write_unlock(&hci_dev_list_lock);
/* Ensure power_on will be canceled, especially while device is
* downloading firmware */
__hci_cmd_sync_cancel(hdev, EHOSTDOWN);
cancel_work_sync(&hdev->rx_work);
cancel_work_sync(&hdev->cmd_work);
cancel_work_sync(&hdev->tx_work);
cancel_work_sync(&hdev->power_on);
cancel_work_sync(&hdev->error_reset);
hci_cmd_sync_clear(hdev);

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