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[u-boot] 9dc8987435: Add FriendlyElec rk3576 board

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Signed-off-by: hmz007 <hmz007@gmail.com>
master
hmz007 10 months ago
parent 6e372e3113
commit d065db1fec
16 changed files with 1181 additions and 3 deletions
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71
u-boot/arch/arm/dts/rk3576-nanopi-m5.dts
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@ -0,0 +1,71 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* (C) Copyright 2025 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*
* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rk3576.dtsi"
#include "rk3576-u-boot.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "FriendlyElec boards based on Rockchip RK3576";
compatible = "friendlyelec,nanopi-m5",
"rockchip,rk3576";
chosen {
u-boot,spl-boot-order = &sdmmc, "same-as-spl", &ufs, &fspi_nor;
};
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 1>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
u-boot,dm-pre-reloc;
status = "okay";
volumeup-key {
u-boot,dm-pre-reloc;
linux,code = <KEY_VOLUMEUP>;
label = "volume up";
press-threshold-microvolt = <1750>;
};
};
};
&fspi1m1_pins {
rockchip,pins =
/* clk, d0~4 */
<1 RK_PD5 3 &pcfg_pull_none>,
<1 RK_PC4 3 &pcfg_pull_none>,
<1 RK_PC5 3 &pcfg_pull_none>,
<1 RK_PC6 3 &pcfg_pull_none>,
<1 RK_PC7 3 &pcfg_pull_none>;
};
&sfc0 {
status = "disabled";
};
&sfc1 {
u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&fspi1m1_csn0 &fspi1m1_pins>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
fspi_nor: flash@0 {
u-boot,dm-spl;
compatible = "jedec,spi-nor";
label = "sfc_nor";
reg = <0>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
spi-max-frequency = <80000000>;
};
};

8
u-boot/arch/arm/mach-rockchip/rk3576/Kconfig
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@ -6,6 +6,13 @@ config TARGET_EVB_RK3576
help
RK3576 EVB is a evaluation board for Rockchp RK3576.
config TARGET_NANOPI_M5
bool "FriendlyElec NanoPi M5 Series"
select BOARD_LATE_INIT
select VENDOR_FRIENDLYELEC
help
Support for FriendlyElec boards based on RK3576.
config SYS_SOC
default "rockchip"
@ -13,5 +20,6 @@ config SYS_MALLOC_F_LEN
default 0x400
source board/rockchip/evb_rk3576/Kconfig
source board/rockchip/nanopi_m5/Kconfig
endif

16
u-boot/arch/arm/mach-rockchip/spl-boot-order.c
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@ -40,8 +40,10 @@ static int spl_node_to_boot_device(int node)
{
struct udevice *parent;
#if defined(CONFIG_UFS)
if (!uclass_get_device_by_of_offset(UCLASS_UFS, node, &parent))
return BOOT_DEVICE_UFS;
#endif
/*
* This should eventually move into the SPL code, once SPL becomes
@ -113,6 +115,7 @@ static int spl_node_to_boot_device(int node)
}
#endif
#if defined(CONFIG_RKNAND)
/*
* This should eventually move into the SPL code, once SPL becomes
* aware of the block-device layer. Until then (and to avoid unneeded
@ -120,6 +123,7 @@ static int spl_node_to_boot_device(int node)
*/
if (!uclass_get_device_by_of_offset(UCLASS_RKNAND, node, &parent))
return BOOT_DEVICE_RKNAND;
#endif
return -1;
}
@ -151,6 +155,9 @@ void board_boot_order(u32 *spl_boot_list)
int boot_device;
int node;
const char *conf;
#if defined(CONFIG_VENDOR_FRIENDLYELEC)
bool same_as_spl = false;
#endif
if (chosen_node < 0) {
debug("%s: /chosen not found, using spl_boot_device()\n",
@ -170,6 +177,9 @@ void board_boot_order(u32 *spl_boot_list)
conf = board_spl_was_booted_from();
if (!conf)
continue;
#if defined(CONFIG_VENDOR_FRIENDLYELEC)
same_as_spl = true;
#endif
}
/* First check if the list element is an alias */
@ -193,6 +203,12 @@ void board_boot_order(u32 *spl_boot_list)
}
spl_boot_list[idx++] = boot_device;
#if defined(CONFIG_VENDOR_FRIENDLYELEC)
if (same_as_spl) {
debug("%s: ignore remaining device\n", __func__);
break;
}
#endif
}
/* If we had no matches, fall back to spl_boot_device */

8
u-boot/arch/arm/mach-rockchip/usbplug.c
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@ -30,6 +30,14 @@ static const struct bootdev_list dev_list[] = {
{IF_TYPE_MTD, 2, 1}, /* BLK_MTD_SPI_NOR FSPI M1 */
{IF_TYPE_MTD, 2, 2}, /* BLK_MTD_SPI_NOR FSPI M2 */
};
#elif CONFIG_IS_ENABLED(TARGET_NANOPI_M5)
static const struct bootdev_list dev_list[] = {
{IF_TYPE_SCSI, 0, 0},
{IF_TYPE_MMC, 0, 0},
{IF_TYPE_MTD, 2, 2}, /* BLK_MTD_SPI_NOR FSPI1 M1 */
{IF_TYPE_MTD, 2, 0}, /* BLK_MTD_SPI_NOR FSPI0 M0 */
{IF_TYPE_MTD, 1, 0}, /* BLK_MTD_SPI_NAND FSPI0 M0 */
};
#elif CONFIG_IS_ENABLED(ROCKCHIP_RK3576)
static const struct bootdev_list dev_list[] = {
{IF_TYPE_SCSI, 0, 0},

15
u-boot/board/rockchip/nanopi_m5/Kconfig
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@ -0,0 +1,15 @@
if TARGET_NANOPI_M5
config SYS_BOARD
default "nanopi_m5"
config SYS_VENDOR
default "rockchip"
config SYS_CONFIG_NAME
default "nanopi_m5"
config BOARD_SPECIFIC_OPTIONS
def_bool y
endif

6
u-boot/board/rockchip/nanopi_m5/MAINTAINERS
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@ -0,0 +1,6 @@
NanoPi M5 Series
M: FriendlyELEC <support@friendlyarm.com>
S: Maintained
F: board/rockchip/nanopi_m5/
F: include/configs/nanopi_m5.h
F: configs/nanopi_m5_defconfig

8
u-boot/board/rockchip/nanopi_m5/Makefile
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@ -0,0 +1,8 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) Guangzhou FriendlyELEC Computer Tech. Co., Ltd.
# (http://www.friendlyelec.com)
#
obj-y += board.o hwrev.o

277
u-boot/board/rockchip/nanopi_m5/board.c
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@ -0,0 +1,277 @@
/*
* SPDX-License-Identifier: GPL-2.0+
*
* Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*/
#include <common.h>
#include <adc.h>
#include <i2c.h>
#include <misc.h>
#include <asm/setup.h>
#include <dwc3-uboot.h>
#include <usb.h>
#include <linux/usb/phy-rockchip-usbdp.h>
#include <asm/io.h>
#include <mapmem.h>
#include <rockusb.h>
#include "hwrev.h"
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_USB_DWC3
#define CRU_BASE 0x27200000
#define CRU_SOFTRST_CON47 0x0abc
static struct dwc3_device dwc3_device_data = {
.maximum_speed = USB_SPEED_SUPER,
.base = 0x23000000,
.dr_mode = USB_DR_MODE_PERIPHERAL,
.index = 0,
.dis_u2_susphy_quirk = 1,
.dis_u1u2_quirk = 1,
.usb2_phyif_utmi_width = 16,
};
int usb_gadget_handle_interrupts(int index)
{
dwc3_uboot_handle_interrupt(0);
return 0;
}
bool rkusb_usb3_capable(void)
{
return true;
}
static void usb_reset_otg_controller(void)
{
writel(0x00200020, CRU_BASE + CRU_SOFTRST_CON47);
mdelay(1);
writel(0x00200000, CRU_BASE + CRU_SOFTRST_CON47);
mdelay(1);
}
int board_usb_init(int index, enum usb_init_type init)
{
u32 ret = 0;
usb_reset_otg_controller();
#if defined(CONFIG_SUPPORT_USBPLUG)
dwc3_device_data.maximum_speed = USB_SPEED_HIGH;
if (rkusb_switch_usb3_enabled()) {
dwc3_device_data.maximum_speed = USB_SPEED_SUPER;
ret = rockchip_u3phy_uboot_init();
if (ret) {
rkusb_force_to_usb2(true);
dwc3_device_data.maximum_speed = USB_SPEED_HIGH;
}
}
#else
ret = rockchip_u3phy_uboot_init();
if (ret) {
rkusb_force_to_usb2(true);
dwc3_device_data.maximum_speed = USB_SPEED_HIGH;
}
#endif
return dwc3_uboot_init(&dwc3_device_data);
}
#if defined(CONFIG_SUPPORT_USBPLUG)
int board_usb_cleanup(int index, enum usb_init_type init)
{
dwc3_uboot_exit(index);
return 0;
}
#endif
#endif
/* Supported panels and dpi for nanopi_m5 series */
static char *panels[] = {
"HD702E,213dpi",
"HD703E,213dpi",
"HDMI1024x768,165dpi",
"HDMI1280x800,168dpi",
};
char *board_get_panel_name(void)
{
char *name;
int i;
name = env_get("panel");
if (!name)
return NULL;
for (i = 0; i < ARRAY_SIZE(panels); i++) {
if (!strncmp(panels[i], name, strlen(name)))
return panels[i];
}
return name;
}
int board_select_fdt_index(ulong dt_table_hdr, struct blk_desc *dev_desc)
{
if (!dev_desc)
return 1;
if (dev_desc->if_type == IF_TYPE_SCSI)
/* UFS */
return 2;
else
return dev_desc->devnum;
}
#if CONFIG_IS_ENABLED(FIT)
int board_get_fdt(char **of_flat_tree, ulong *of_size)
{
char *fdt_blob;
ulong fdt_addr_r;
if (!of_flat_tree || *of_flat_tree)
return 0;
fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
if (fdt_addr_r && gd->fdt_blob == (void *)fdt_addr_r) {
printf("## Flattened Device Tree blob at %#010lx\n", fdt_addr_r);
fdt_blob = map_sysmem(fdt_addr_r, 0);
*of_flat_tree = fdt_blob;
*of_size = fdt_totalsize(fdt_blob);
}
return 0;
}
#endif
static int board_check_supply(void)
{
u32 adc_reading = 0;
int mv = 5000;
adc_channel_single_shot("adc", 2, &adc_reading);
debug("ADC reading %d\n", adc_reading);
mv = adc_reading * 2475 / 512;
printf("vdd_usbc %d mV\n", mv);
return 0;
}
static int mac_read_from_generic_eeprom(u8 *addr)
{
struct udevice *i2c_dev;
int ret;
/* Microchip 24AA02xxx EEPROMs with EUI-48 Node Identity */
ret = i2c_get_chip_for_busnum(5, 0x53, 1, &i2c_dev);
if (!ret)
ret = dm_i2c_read(i2c_dev, 0xfa, addr, 6);
return ret;
}
static void __maybe_unused setup_macaddr(void)
{
u8 mac_addr[6] = { 0 };
int lockdown = 0;
int ret;
#ifndef CONFIG_ENV_IS_NOWHERE
lockdown = env_get_yesno("lockdown") == 1;
#endif
if (lockdown && env_get("ethaddr"))
return;
ret = mac_read_from_generic_eeprom(mac_addr);
if (!ret && is_valid_ethaddr(mac_addr)) {
debug("MAC: %pM\n", mac_addr);
eth_env_set_enetaddr("ethaddr", mac_addr);
}
}
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
setup_macaddr();
return 0;
}
#endif
#ifdef CONFIG_DISPLAY_BOARDINFO
int show_board_info(void)
{
printf("Board: %s\n", get_board_name());
return 0;
}
#endif
#ifdef CONFIG_REVISION_TAG
static void set_board_rev(void)
{
char info[64] = {0, };
snprintf(info, ARRAY_SIZE(info), "%02x", get_board_rev());
env_set("board_rev", info);
}
#endif
void set_dtb_name(void)
{
char info[64] = {0, };
#ifndef CONFIG_ENV_IS_NOWHERE
if (env_get_yesno("lockdown") == 1 &&
env_get("dtb_name"))
return;
#endif
snprintf(info, ARRAY_SIZE(info),
"rk3576-nanopi5-rev%02x.dtb", get_board_rev());
env_set("dtb_name", info);
}
#ifdef CONFIG_SERIAL_TAG
void get_board_serial(struct tag_serialnr *serialnr)
{
char *serial_string;
u64 serial = 0;
serial_string = env_get("serial#");
if (serial_string)
serial = simple_strtoull(serial_string, NULL, 16);
serialnr->high = (u32)(serial >> 32);
serialnr->low = (u32)(serial & 0xffffffff);
}
#endif
#ifdef CONFIG_BOARD_LATE_INIT
int rk_board_late_init(void)
{
board_check_supply();
#ifdef CONFIG_REVISION_TAG
set_board_rev();
#endif
#ifdef CONFIG_SILENT_CONSOLE
gd->flags &= ~GD_FLG_SILENT;
#endif
printf("\n");
return 0;
}
#endif

110
u-boot/board/rockchip/nanopi_m5/hwrev.c
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@ -0,0 +1,110 @@
/*
* Copyright (C) Guangzhou FriendlyELEC Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, you can access it online at
* http://www.gnu.org/licenses/gpl-2.0.html.
*/
#include <config.h>
#include <common.h>
#include <adc.h>
#include <asm/io.h>
#include <asm/gpio.h>
/*
* ID info:
* ID : Volts : ADC value : Bucket
* == ===== ========= ===========
* 0 : 0.102V: 58 : 0 - 81
* 1 : 0.211V: 120 : 82 - 150
* 2 : 0.319V: 181 : 151 - 211
* 3 : 0.427V: 242 : 212 - 274
* 4 : 0.542V: 307 : 275 - 342
* 5 : 0.666V: 378 : 343 - 411
* 6 : 0.781V: 444 : 412 - 477
* 7 : 0.900V: 511 : 478 - 545
* 8 : 1.023V: 581 : 546 - 613
* 9 : 1.137V: 646 : 614 - 675
* 10 : 1.240V: 704 : 676 - 733
* 11 : 1.343V: 763 : 734 - 795
* 12 : 1.457V: 828 : 796 - 861
* 13 : 1.576V: 895 : 862 - 925
* 14 : 1.684V: 956 : 926 - 989
* 15 : 1.800V: 1023 : 990 - 1023
*/
static const int id_readings[] = {
81, 150, 211, 274, 342, 411, 477, 545,
613, 675, 733, 795, 861, 925, 989, 1023
};
static int cached_board_id = -1;
static uint32_t get_adc_index(int chn)
{
int i;
u32 adc_reading = 0;
if (cached_board_id != -1)
return cached_board_id;
adc_channel_single_shot("adc", chn, &adc_reading);
/* rockchip-saradc-v2 */
adc_reading >>= 2;
for (i = 0; i < ARRAY_SIZE(id_readings); i++) {
if (adc_reading <= id_readings[i]) {
debug("ADC reading %d, ID %d\n", adc_reading, i);
cached_board_id = i;
return i;
}
}
/* should die for impossible value */
return 0;
}
/*
* Board revision by ADC_IN5
* 0b01 - NanoPi-M5
*/
static int pcb_rev = -1;
void bd_hwrev_init(void)
{
if (pcb_rev >= 0)
return;
pcb_rev = get_adc_index(5);
}
/* To override __weak symbols */
u32 get_board_rev(void)
{
return pcb_rev;
}
const char *get_board_name(void)
{
bd_hwrev_init();
switch (pcb_rev) {
case 0x01:
return "NanoPi M5";
default:
return "FriendlyELEC RK3576 board";
}
}

28
u-boot/board/rockchip/nanopi_m5/hwrev.h
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@ -0,0 +1,28 @@
/*
* Copyright (C) Guangzhou FriendlyELEC Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, you can access it online at
* http://www.gnu.org/licenses/gpl-2.0.html.
*/
#ifndef __BD_HW_REV_H__
#define __BD_HW_REV_H__
extern void bd_hwrev_config_gpio(void);
extern void bd_hwrev_init(void);
extern u32 get_board_rev(void);
extern const char *get_board_name(void);
#endif /* __BD_HW_REV_H__ */

12
u-boot/common/image-fdt.c
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@ -28,6 +28,13 @@
DECLARE_GLOBAL_DATA_PTR;
#if CONFIG_IS_ENABLED(FIT)
__weak int board_get_fdt(char **of_flat_tree, ulong *of_size)
{
return 0;
}
#endif
static void fdt_error(const char *msg)
{
puts("ERROR: ");
@ -419,9 +426,10 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
fdt_noffset = fit_get_node_from_config(images,
FIT_FDT_PROP,
fdt_addr);
if (fdt_noffset == -ENOENT)
if (fdt_noffset == -ENOENT) {
board_get_fdt(of_flat_tree, of_size);
return 0;
else if (fdt_noffset < 0)
} else if (fdt_noffset < 0)
return 1;
}
#endif

235
u-boot/configs/nanopi_m5_ab_defconfig
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@ -0,0 +1,235 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x80000
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
CONFIG_ROCKCHIP_RK3576=y
CONFIG_ROCKCHIP_FIT_IMAGE=y
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
CONFIG_USING_KERNEL_DTB_V2=y
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
CONFIG_ROCKCHIP_NEW_IDB=y
CONFIG_LOADER_INI="NANOPIM5MINIALL.ini"
CONFIG_SANITY_CPU_SWAP=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TARGET_NANOPI_M5=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV8_CRYPTO=y
CONFIG_DEFAULT_DEVICE_TREE="rk3576-nanopi-m5"
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_FIT_HW_CRYPTO=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_FIT_HW_CRYPTO=y
# CONFIG_SPL_SYS_DCACHE_OFF is not set
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ANDROID_BOOTLOADER=y
CONFIG_ANDROID_AB=y
CONFIG_ANDROID_AVB=y
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
CONFIG_BOARD_RNG_SEED=y
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_UFS_SUPPORT=y
CONFIG_SPL_ATF=y
CONFIG_SPL_AB=y
CONFIG_FASTBOOT_BUF_ADDR=0x40c00800
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DTIMG=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_BOOT_ANDROID=y
CONFIG_CMD_BOOT_ROCKCHIP=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_UFS=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTP_BOOTM=y
CONFIG_CMD_TFTP_FLASH=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_MTD_BLK=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_DTB_MINIMUM=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
# CONFIG_NET_TFTP_VARS is not set
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SARADC_ROCKCHIP is not set
CONFIG_SARADC_ROCKCHIP_V2=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_SCMI=y
CONFIG_DM_CRYPTO=y
CONFIG_SPL_DM_CRYPTO=y
CONFIG_ROCKCHIP_CRYPTO_V2=y
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_SCMI_FIRMWARE=y
CONFIG_GPIO_HOG=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_ROCKCHIP_GPIO_V2=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_I2C_MUX=y
CONFIG_DM_KEY=y
CONFIG_RK8XX_PWRKEY=y
CONFIG_ADC_KEY=y
CONFIG_MISC=y
CONFIG_SPL_MISC=y
CONFIG_MISC_DECOMPRESS=y
CONFIG_SPL_MISC_DECOMPRESS=y
CONFIG_ROCKCHIP_OTP=y
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_MTD=y
CONFIG_MTD_BLK=y
CONFIG_MTD_DEVICE=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0x1
CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_DM_ETH_PHY=y
CONFIG_DWC_ETH_QOS=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_FUEL_GAUGE=y
CONFIG_POWER_FG_CW201X=y
CONFIG_POWER_FG_CW221X=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_DM_POWER_DELIVERY=y
CONFIG_TYPEC_TCPM=y
CONFIG_TYPEC_TCPCI=y
CONFIG_TYPEC_HUSB311=y
CONFIG_TYPEC_FUSB302=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_CHARGER_BQ25700=y
CONFIG_CHARGER_BQ25890=y
CONFIG_CHARGER_SGM41542=y
CONFIG_DM_CHARGE_DISPLAY=y
CONFIG_CHARGE_ANIMATION=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
CONFIG_DM_RAMDISK=y
CONFIG_RAMDISK_RO=y
CONFIG_DM_RESET=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_RESET_ROCKCHIP=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_BASE=0x2ad40000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
CONFIG_USB_GADGET_PRODUCT_NUM=0x350e
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_UFS=y
CONFIG_ROCKCHIP_UFS=y
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_DRM_ROCKCHIP=y
CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
CONFIG_DRM_ROCKCHIP_DW_DP=y
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
CONFIG_DRM_ROCKCHIP_RGB=y
CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_LIB_RAND=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_N_SIZE=0x200
CONFIG_RSA_E_SIZE=0x10
CONFIG_RSA_C_SIZE=0x20
CONFIG_XBC=y
CONFIG_LZ4=y
CONFIG_SPL_GZIP=y
CONFIG_ERRNO_STR=y
# CONFIG_EFI_LOADER is not set
CONFIG_AVB_LIBAVB=y
CONFIG_AVB_LIBAVB_AB=y
CONFIG_AVB_LIBAVB_ATX=y
CONFIG_AVB_LIBAVB_USER=y
CONFIG_RK_AVB_LIBAVB_USER=y
CONFIG_OPTEE_CLIENT=y
CONFIG_OPTEE_V2=y
CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

234
u-boot/configs/nanopi_m5_defconfig
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@ -0,0 +1,234 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x80000
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
CONFIG_ROCKCHIP_RK3576=y
CONFIG_ROCKCHIP_FIT_IMAGE=y
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
CONFIG_USING_KERNEL_DTB_V2=y
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
CONFIG_ROCKCHIP_NEW_IDB=y
CONFIG_LOADER_INI="NANOPIM5MINIALL.ini"
CONFIG_SANITY_CPU_SWAP=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TARGET_NANOPI_M5=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV8_CRYPTO=y
CONFIG_DEFAULT_DEVICE_TREE="rk3576-nanopi-m5"
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_FIT_HW_CRYPTO=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_FIT_HW_CRYPTO=y
# CONFIG_SPL_SYS_DCACHE_OFF is not set
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ANDROID_BOOTLOADER=y
CONFIG_ANDROID_AVB=y
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
CONFIG_BOARD_RNG_SEED=y
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_UFS_SUPPORT=y
CONFIG_SPL_ATF=y
CONFIG_SPL_AB=y
CONFIG_FASTBOOT_BUF_ADDR=0x40c00800
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DTIMG=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_BOOT_ANDROID=y
CONFIG_CMD_BOOT_ROCKCHIP=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_UFS=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTP_BOOTM=y
CONFIG_CMD_TFTP_FLASH=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_MTD_BLK=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_DTB_MINIMUM=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
# CONFIG_NET_TFTP_VARS is not set
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SARADC_ROCKCHIP is not set
CONFIG_SARADC_ROCKCHIP_V2=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_SCMI=y
CONFIG_DM_CRYPTO=y
CONFIG_SPL_DM_CRYPTO=y
CONFIG_ROCKCHIP_CRYPTO_V2=y
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_SCMI_FIRMWARE=y
CONFIG_GPIO_HOG=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_ROCKCHIP_GPIO_V2=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_I2C_MUX=y
CONFIG_DM_KEY=y
CONFIG_RK8XX_PWRKEY=y
CONFIG_ADC_KEY=y
CONFIG_MISC=y
CONFIG_SPL_MISC=y
CONFIG_MISC_DECOMPRESS=y
CONFIG_SPL_MISC_DECOMPRESS=y
CONFIG_ROCKCHIP_OTP=y
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_MTD=y
CONFIG_MTD_BLK=y
CONFIG_MTD_DEVICE=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0x1
CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_DM_ETH_PHY=y
CONFIG_DWC_ETH_QOS=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_FUEL_GAUGE=y
CONFIG_POWER_FG_CW201X=y
CONFIG_POWER_FG_CW221X=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_DM_POWER_DELIVERY=y
CONFIG_TYPEC_TCPM=y
CONFIG_TYPEC_TCPCI=y
CONFIG_TYPEC_HUSB311=y
CONFIG_TYPEC_FUSB302=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_CHARGER_BQ25700=y
CONFIG_CHARGER_BQ25890=y
CONFIG_CHARGER_SGM41542=y
CONFIG_DM_CHARGE_DISPLAY=y
CONFIG_CHARGE_ANIMATION=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
CONFIG_DM_RAMDISK=y
CONFIG_RAMDISK_RO=y
CONFIG_DM_RESET=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_RESET_ROCKCHIP=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_BASE=0x2ad40000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
CONFIG_USB_GADGET_PRODUCT_NUM=0x350e
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_UFS=y
CONFIG_ROCKCHIP_UFS=y
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_DRM_ROCKCHIP=y
CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
CONFIG_DRM_ROCKCHIP_DW_DP=y
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
CONFIG_DRM_ROCKCHIP_RGB=y
CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_LIB_RAND=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_N_SIZE=0x200
CONFIG_RSA_E_SIZE=0x10
CONFIG_RSA_C_SIZE=0x20
CONFIG_XBC=y
CONFIG_LZ4=y
CONFIG_SPL_GZIP=y
CONFIG_ERRNO_STR=y
# CONFIG_EFI_LOADER is not set
CONFIG_AVB_LIBAVB=y
CONFIG_AVB_LIBAVB_AB=y
CONFIG_AVB_LIBAVB_ATX=y
CONFIG_AVB_LIBAVB_USER=y
CONFIG_RK_AVB_LIBAVB_USER=y
CONFIG_OPTEE_CLIENT=y
CONFIG_OPTEE_V2=y
CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

101
u-boot/configs/nanopi_m5_usbplug.config
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@ -0,0 +1,101 @@
CONFIG_ARM64=y
CONFIG_ARM_PSCI_FW=y
CONFIG_ARM_SMCCC=y
# CONFIG_ARMV8_CRYPTO is not set
# CONFIG_ARMV8_MULTIENTRY is not set
# CONFIG_ARMV8_PSCI is not set
# CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT is not set
# CONFIG_ARMV8_SET_SMPEN is not set
CONFIG_BASE_DEFCONFIG="rockchip-usbplug_defconfig"
CONFIG_CMD_BOOTI=y
CONFIG_DEBUG_UART_BASE=0x2ad40000
CONFIG_DEFAULT_DEVICE_TREE="rk3576-nanopi-m5"
CONFIG_DMA_ADDR_T_64BIT=y
CONFIG_DM_RESET=y
CONFIG_FIRMWARE=y
CONFIG_GICV2=y
CONFIG_IRQ=y
# CONFIG_MMC_DW is not set
# CONFIG_MMC_SDHCI_BCMSTB is not set
# CONFIG_MMC_SDHCI_CADENCE is not set
# CONFIG_MMC_SDHCI_KONA is not set
# CONFIG_MMC_SDHCI_MSM is not set
CONFIG_MMC_SDHCI_ROCKCHIP=y
# CONFIG_MMC_SDHCI_S5P is not set
CONFIG_MMC_SDHCI_SDMA=y
# CONFIG_MMC_SDHCI_SPEAR is not set
# CONFIG_MMC_SDHCI_STI is not set
# CONFIG_MMC_SDHCI_TANGIER is not set
# CONFIG_MMC_SDHCI_XENON is not set
CONFIG_MMC_SDHCI=y
CONFIG_MTD_NAND_BBT_USING_FLASH=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_SPI_NAND=y
# CONFIG_NAND_ARASAN is not set
# CONFIG_NAND_ATMEL is not set
# CONFIG_NAND_BRCMNAND is not set
# CONFIG_NAND_DAVINCI is not set
# CONFIG_NAND_DENALI_DT is not set
# CONFIG_NAND_LPC32XX_SLC is not set
# CONFIG_NAND_PXA3XX is not set
# CONFIG_NAND_ROCKCHIP is not set
# CONFIG_NAND_ROCKCHIP_V9 is not set
# CONFIG_NAND_VF610_NFC is not set
CONFIG_NAND=y
# CONFIG_NAND_ZYNQ is not set
# CONFIG_NOP_PHY is not set
CONFIG_OF_LIVE=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_PHYS_64BIT=y
CONFIG_PHY=y
# CONFIG_POSITION_INDEPENDENT is not set
CONFIG_PSCI_RESET=y
CONFIG_RESET_ROCKCHIP=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0x26024040
CONFIG_ROCKCHIP_BROM_HELPER=y
# CONFIG_ROCKCHIP_DEBUGGER is not set
CONFIG_ROCKCHIP_IRAM_START_ADDR=0x3ff80000
CONFIG_ROCKCHIP_NEW_IDB=y
CONFIG_ROCKCHIP_RK3576=y
# CONFIG_ROCKCHIP_RV1126 is not set
CONFIG_ROCKCHIP_STIMER_BASE=0x27400000
# CONFIG_SCMI_FIRMWARE is not set
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_XMC=y
CONFIG_SPI_FLASH_XTX=y
CONFIG_SPI_NAND_BIWIN=y
CONFIG_SPI_NAND_DOSILICON=y
CONFIG_SPI_NAND_ESMT=y
CONFIG_SPI_NAND_ETRON=y
CONFIG_SPI_NAND_FMSH=y
CONFIG_SPI_NAND_FORESEE=y
CONFIG_SPI_NAND_GIGADEVICE=y
CONFIG_SPI_NAND_GSTO=y
CONFIG_SPI_NAND_HYF=y
CONFIG_SPI_NAND_JSC=y
CONFIG_SPI_NAND_MACRONIX=y
CONFIG_SPI_NAND_MICRON=y
CONFIG_SPI_NAND_SILICONGO=y
CONFIG_SPI_NAND_SKYHIGH=y
CONFIG_SPI_NAND_TOSHIBA=y
CONFIG_SPI_NAND_UNIM=y
CONFIG_SPI_NAND_WINBOND=y
CONFIG_SPI_NAND_XINCUN=y
CONFIG_SPI_NAND_XTX=y
# CONFIG_SPL_ARMV8_SEC_FIRMWARE_SUPPORT is not set
CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
# CONFIG_SPL_SCMI_FIRMWARE is not set
CONFIG_STATIC_RELA=y
CONFIG_SYS_ARM_ARCH=8
CONFIG_SYS_CPU="armv8"
CONFIG_SYSRESET_PSCI=y
CONFIG_TARGET_NANOPI_M5=y
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
CONFIG_TPL_MAX_SIZE=61440
CONFIG_TPL_TEXT_BASE=0x3ff81000
CONFIG_DM_SCSI=y
CONFIG_UFS=y
CONFIG_SCSI=y
CONFIG_CMD_UFS=y
CONFIG_ROCKCHIP_UFS=y
CONFIG_CMD_SCSI=y

2
u-boot/drivers/core/device.c
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@ -55,7 +55,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
if (gd->flags & GD_FLG_RELOC) {
#if defined(CONFIG_USING_KERNEL_DTB_V2)
if ((gd->flags & GD_FLG_KDTB_READY) &&
(drv->id == UCLASS_MMC)) {
(drv->id == UCLASS_MMC || drv->id == UCLASS_UFS)) {
if (!uclass_find_device_by_name(drv->id, name, &dev)) {
debug("Ignore %s from kernel\n", name);
return 0;

53
u-boot/include/configs/nanopi_m5.h
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@ -0,0 +1,53 @@
/*
* SPDX-License-Identifier: GPL-2.0+
*
* Copyright (C) Guangzhou FriendlyELEC Computer Tech. Co., Ltd.
* (http://www.friendlyarm.com)
*
* Copyright (c) 2023 Rockchip Electronics Co., Ltd
*/
#ifndef __CONFIG_NANOPI_M5_H__
#define __CONFIG_NANOPI_M5_H__
#include <configs/rk3576_common.h>
/* Remove or override few declarations from rk3576-common.h */
#undef CONFIG_BOOTCOMMAND
#undef CONFIG_DISPLAY_BOARDINFO_LATE
#undef RKIMG_DET_BOOTDEV
#undef RKIMG_BOOTCOMMAND
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 32768
#define CONFIG_MISC_INIT_R
#define CONFIG_SERIAL_TAG
#ifndef CONFIG_SPL_BUILD
#define ROCKCHIP_DEVICE_SETTINGS \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#define RKIMG_DET_BOOTDEV \
"rkimg_bootdev=" \
"if mmc dev 1 && rkimgtest mmc 1; then " \
"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard;" \
"elif mmc dev 0; then " \
"setenv devtype mmc; setenv devnum 0;" \
"elif rksfc dev 1; then " \
"setenv devtype spinor; setenv devnum 1;" \
"fi; \0"
#define RKIMG_BOOTCOMMAND \
"boot_fit;" \
"boot_android ${devtype} ${devnum};" \
"bootrkp;" \
"run distro_bootcmd;"
#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
#endif
#endif /* __CONFIG_NANOPI_M5_H__ */
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