# AIC USERCONFIG 2022/0803/1707 # txpwr_lvl enable=1 lvl_11b_11ag_1m_2g4=18 lvl_11b_11ag_2m_2g4=18 lvl_11b_11ag_5m5_2g4=18 lvl_11b_11ag_11m_2g4=18 lvl_11b_11ag_6m_2g4=18 lvl_11b_11ag_9m_2g4=18 lvl_11b_11ag_12m_2g4=18 lvl_11b_11ag_18m_2g4=18 lvl_11b_11ag_24m_2g4=16 lvl_11b_11ag_36m_2g4=16 lvl_11b_11ag_48m_2g4=15 lvl_11b_11ag_54m_2g4=15 lvl_11n_11ac_mcs0_2g4=18 lvl_11n_11ac_mcs1_2g4=18 lvl_11n_11ac_mcs2_2g4=18 lvl_11n_11ac_mcs3_2g4=18 lvl_11n_11ac_mcs4_2g4=16 lvl_11n_11ac_mcs5_2g4=16 lvl_11n_11ac_mcs6_2g4=15 lvl_11n_11ac_mcs7_2g4=15 lvl_11n_11ac_mcs8_2g4=14 lvl_11n_11ac_mcs9_2g4=14 lvl_11ax_mcs0_2g4=18 lvl_11ax_mcs1_2g4=18 lvl_11ax_mcs2_2g4=18 lvl_11ax_mcs3_2g4=18 lvl_11ax_mcs4_2g4=16 lvl_11ax_mcs5_2g4=16 lvl_11ax_mcs6_2g4=15 lvl_11ax_mcs7_2g4=15 lvl_11ax_mcs8_2g4=14 lvl_11ax_mcs9_2g4=14 lvl_11ax_mcs10_2g4=13 lvl_11ax_mcs11_2g4=13 lvl_11a_6m_5g=18 lvl_11a_9m_5g=18 lvl_11a_12m_5g=18 lvl_11a_18m_5g=18 lvl_11a_24m_5g=16 lvl_11a_36m_5g=16 lvl_11a_48m_5g=15 lvl_11a_54m_5g=15 lvl_11n_11ac_mcs0_5g=18 lvl_11n_11ac_mcs1_5g=18 lvl_11n_11ac_mcs2_5g=18 lvl_11n_11ac_mcs3_5g=18 lvl_11n_11ac_mcs4_5g=16 lvl_11n_11ac_mcs5_5g=16 lvl_11n_11ac_mcs6_5g=15 lvl_11n_11ac_mcs7_5g=15 lvl_11n_11ac_mcs8_5g=14 lvl_11n_11ac_mcs9_5g=14 lvl_11ax_mcs0_5g=18 lvl_11ax_mcs1_5g=18 lvl_11ax_mcs2_5g=18 lvl_11ax_mcs3_5g=18 lvl_11ax_mcs4_5g=16 lvl_11ax_mcs5_5g=16 lvl_11ax_mcs6_5g=14 lvl_11ax_mcs7_5g=14 lvl_11ax_mcs8_5g=13 lvl_11ax_mcs9_5g=13 lvl_11ax_mcs10_5g=12 lvl_11ax_mcs11_5g=12 # txpwr_lvl_adj lvl_adj_enable=0 lvl_adj_2g4_chan_1_4=0 lvl_adj_2g4_chan_5_9=0 lvl_adj_2g4_chan_10_13=0 lvl_adj_5g_chan_42=0 lvl_adj_5g_chan_58=0 lvl_adj_5g_chan_106=0 lvl_adj_5g_chan_122=0 lvl_adj_5g_chan_138=0 lvl_adj_5g_chan_155=0 # txpwr_loss loss_enable=0 loss_value=2 # txpwr_ofst ofst_enable=0 ofst_2g4_11b_chan_1_4=0 ofst_2g4_11b_chan_5_9=0 ofst_2g4_11b_chan_10_13=0 ofst_2g4_ofdm_highrate_chan_1_4=0 ofst_2g4_ofdm_highrate_chan_5_9=0 ofst_2g4_ofdm_highrate_chan_10_13=0 ofst_2g4_ofdm_lowrate_chan_1_4=0 ofst_2g4_ofdm_lowrate_chan_5_9=0 ofst_2g4_ofdm_lowrate_chan_10_13=0 ofst_5g_ofdm_lowrate_chan_42=0 ofst_5g_ofdm_lowrate_chan_58=0 ofst_5g_ofdm_lowrate_chan_106=0 ofst_5g_ofdm_lowrate_chan_122=0 ofst_5g_ofdm_lowrate_chan_138=0 ofst_5g_ofdm_lowrate_chan_155=0 ofst_5g_ofdm_highrate_chan_42=0 ofst_5g_ofdm_highrate_chan_58=0 ofst_5g_ofdm_highrate_chan_106=0 ofst_5g_ofdm_highrate_chan_122=0 ofst_5g_ofdm_highrate_chan_138=0 ofst_5g_ofdm_highrate_chan_155=0 ofst_5g_ofdm_midrate_chan_42=0 ofst_5g_ofdm_midrate_chan_58=0 ofst_5g_ofdm_midrate_chan_106=0 ofst_5g_ofdm_midrate_chan_122=0 ofst_5g_ofdm_midrate_chan_138=0 ofst_5g_ofdm_midrate_chan_155=0 # xtal cap xtal_enable=0 xtal_cap=24 xtal_cap_fine=31