Files
rk35xx-android14/external/llvm/test/CodeGen/Generic/BasicInstrs.ll
T
hmz007 36ed224bac Rockchip Anroid14_SDK 20240628-rkr5 (2556df1a)
Signed-off-by: hmz007 <hmz007@gmail.com>
Change-Id: Ib87fdbe7a0be7dc961af3500fe9ea4589a127f9f
2024-10-29 18:12:02 +08:00

55 lines
1020 B
LLVM

; New testcase, this contains a bunch of simple instructions that should be
; handled by a code generator.
; RUN: llc < %s
define i32 @add(i32 %A, i32 %B) {
%R = add i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}
define i32 @sub(i32 %A, i32 %B) {
%R = sub i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}
define i32 @mul(i32 %A, i32 %B) {
%R = mul i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}
define i32 @sdiv(i32 %A, i32 %B) {
%R = sdiv i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}
define i32 @udiv(i32 %A, i32 %B) {
%R = udiv i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}
define i32 @srem(i32 %A, i32 %B) {
%R = srem i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}
define i32 @urem(i32 %A, i32 %B) {
%R = urem i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}
define i32 @and(i32 %A, i32 %B) {
%R = and i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}
define i32 @or(i32 %A, i32 %B) {
%R = or i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}
define i32 @xor(i32 %A, i32 %B) {
%R = xor i32 %A, %B ; <i32> [#uses=1]
ret i32 %R
}