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318 lines
10 KiB
318 lines
10 KiB
//
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// Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved.
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// SPDX-License-Identifier: MIT
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//
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#include "ConvolutionTestHelper.hpp"
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#include <armnn_delegate.hpp>
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#include <flatbuffers/flatbuffers.h>
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#include <tensorflow/lite/interpreter.h>
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#include <tensorflow/lite/kernels/register.h>
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#include <tensorflow/lite/model.h>
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#include <schema_generated.h>
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#include <doctest/doctest.h>
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namespace armnnDelegate
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{
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// Conv3d is currently only supports Float32 inputs, filter, bias and outputs in TFLite.
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// Conv3d is only correctly supported for external delegates from TF Lite v2.6, as there was a breaking bug in v2.5.
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#if defined(ARMNN_POST_TFLITE_2_5)
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// Create a vector from 0 to size divided to create smaller floating point values.
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template <typename T>
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std::vector<T> CreateFloatData(int32_t size, float divisor)
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{
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std::vector<float> data;
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for (int32_t i = 0; i < size; ++i)
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{
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float value = static_cast<float>(i);
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data.push_back(value/divisor);
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}
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return data;
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}
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void Conv3DWithBiasesSimpleWithPaddingFp32Test(std::vector<armnn::BackendId>& backends)
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{
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// Set input data
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std::vector<int32_t> inputShape { 1, 2, 2, 2, 1 };
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std::vector<int32_t> filterShape { 2, 2, 2, 1, 1 };
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std::vector<int32_t> biasShape { 1 };
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std::vector<int32_t> outputShape { 1, 2, 2, 2, 1 };
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static std::vector<float> inputValues =
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{
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1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f
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};
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std::vector<float> filterValues =
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{
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2.f,1.f, 1.f,0.f, 0.f,1.f, 1.f,1.f
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};
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std::vector<float> biasValues = { 5.f };
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std::vector<float> expectedOutputValues =
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{
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33.f, 21.f, 23.f, 13.f, 28.f, 25.f, 27.f, 21.f
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};
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Convolution3dTest<float>(tflite::BuiltinOperator_CONV_3D,
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::tflite::TensorType_FLOAT32,
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{ 1, 1, 1 }, // strideX, strideY, strideZ
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{ 1, 1, 1 }, // dilationX, dilationY, dilationZ
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tflite::Padding_SAME,
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tflite::ActivationFunctionType_NONE,
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backends,
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inputShape,
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filterShape,
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outputShape,
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inputValues,
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filterValues,
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expectedOutputValues,
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biasShape,
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biasValues);
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}
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void Conv3DWithBiasesStridesFp32Test(std::vector<armnn::BackendId>& backends)
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{
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std::vector<int32_t> inputShape { 1, 3, 10, 10, 1 };
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std::vector<int32_t> filterShape { 3, 5, 5, 1, 1 };
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std::vector<int32_t> biasShape { 1 };
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std::vector<int32_t> outputShape { 1, 1, 3, 3, 1 };
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std::vector<float> inputValues = CreateFloatData<float>(300, 1.0f);
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std::vector<float> filterValues =
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{
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1.f, 1.f, 1.f, 1.f, 1.f,
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1.f, 1.f, 1.f, 1.f, 1.f,
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1.f, 1.f, 1.f, 1.f, 1.f,
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1.f, 1.f, 1.f, 1.f, 1.f,
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1.f, 1.f, 1.f, 1.f, 1.f,
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0.f, 0.f, 0.f, 0.f, 0.f,
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0.f, 0.f, 0.f, 0.f, 0.f,
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0.f, 0.f, 0.f, 0.f, 0.f,
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0.f, 0.f, 0.f, 0.f, 0.f,
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0.f, 0.f, 0.f, 0.f, 0.f,
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2.f, 2.f, 2.f, 2.f, 2.f,
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2.f, 2.f, 2.f, 2.f, 2.f,
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2.f, 2.f, 2.f, 2.f, 2.f,
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2.f, 2.f, 2.f, 2.f, 2.f,
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2.f, 2.f, 2.f, 2.f, 2.f
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};
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std::vector<float> biasValues = { 10.f };
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std::vector<float> expectedOutputValues =
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{
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11660.f, 11810.f, 11960.f,
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13160.f, 13310.f, 13460.f,
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14660.f, 14810.f, 14960.f
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};
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Convolution3dTest<float>(tflite::BuiltinOperator_CONV_3D,
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::tflite::TensorType_FLOAT32,
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{ 2, 2, 2 }, // strideX, strideY, strideZ
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{ 1, 1, 1 }, // dilationX, dilationY, dilationZ
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tflite::Padding_VALID,
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tflite::ActivationFunctionType_NONE,
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backends,
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inputShape,
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filterShape,
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outputShape,
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inputValues,
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filterValues,
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expectedOutputValues,
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biasShape,
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biasValues);
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}
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void Conv3DWithBiasesDilationFp32Test(std::vector<armnn::BackendId>& backends)
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{
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std::vector<int32_t> inputShape { 1, 5, 5, 5, 2 };
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std::vector<int32_t> filterShape { 2, 2, 2, 2, 2 };
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std::vector<int32_t> biasShape { 2 };
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std::vector<int32_t> outputShape { 1, 2, 2, 2, 2 };
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std::vector<float> inputValues = CreateFloatData<float>(250, 1.0f);
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std::vector<float> filterValues =
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{
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-1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, 1.f, 1.f, 1.f, -1.f, -1.f,
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1.f, 1.f, -1.f, 1.f, -1.f, 1.f, -1.f, 1.f, -1.f, -1.f, -1.f, 1.f, -1.f, 1.f, -1.f, 1.f,
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};
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std::vector<float> biasValues = { 0.f, 2.f };
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// Since the dilation rate is 3 this will dilate the kernel to be 4x4,
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// therefore the output will be 2x2
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std::vector<float> expectedOutputValues =
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{
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-1124.f, 976.f,
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-1148.f, 980.f,
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-1244.f, 996.f,
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-1268.f, 1000.f,
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-1724.f, 1076.f,
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-1748.f, 1080.f,
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-1844.f, 1096.f,
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-1868.f, 1100.f
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};
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Convolution3dTest<float>(tflite::BuiltinOperator_CONV_3D,
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::tflite::TensorType_FLOAT32,
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{ 1, 1, 1 }, // strideX, strideY, strideZ
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{ 3, 3, 3 }, // dilationX, dilationY, dilationZ
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tflite::Padding_VALID,
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tflite::ActivationFunctionType_NONE,
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backends,
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inputShape,
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filterShape,
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outputShape,
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inputValues,
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filterValues,
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expectedOutputValues,
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biasShape,
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biasValues);
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}
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void Conv3DFp32SmallTest(std::vector<armnn::BackendId>& backends)
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{
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std::vector<int32_t> inputShape { 1, 3, 10, 10, 1 };
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std::vector<int32_t> filterShape { 3, 3, 3, 1, 1 };
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std::vector<int32_t> biasShape { 1 };
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std::vector<int32_t> outputShape { 1, 1, 4, 4, 1 };
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std::vector<float> inputValues = CreateFloatData<float>(300, 100.0f);
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std::vector<float> filterValues =
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{
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0.125977f, 0.150391f, 0.101562f,
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0.0585938f, 0.0864258f, 0.043457f,
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0.034668f, 0.0322266f, 0.0385742f,
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0.125977f, 0.150391f, -0.101562f,
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-0.0585938f,-0.0864258f,-0.043457f,
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-0.0104630f, 0.0154114f, 0.0013768f,
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0.0344238f, 0.035644f, 0.0495605f,
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0.0683594f, 0.099121f, -0.0461426f,
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-0.0996094f,-0.126953f, -0.043457f,
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};
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std::vector<float> biasValues = { 0 };
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std::vector<float> expectedOutputValues =
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{
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-0.08156067f, -0.06891209f, -0.05589598f, -0.04310101f,
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0.04584253f, 0.05855697f, 0.07129729f, 0.08325434f,
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0.17304349f, 0.18521416f, 0.19818866f, 0.21096253f,
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0.29965734f, 0.312698f, 0.32547557f, 0.33818722f
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};
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Convolution3dTest<float>(tflite::BuiltinOperator_CONV_3D,
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::tflite::TensorType_FLOAT32,
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{ 2, 2, 2 }, // strideX, strideY, strideZ
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{ 1, 1, 1 }, // dilationX, dilationY, dilationZ
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tflite::Padding_VALID,
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tflite::ActivationFunctionType_NONE,
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backends,
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inputShape,
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filterShape,
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outputShape,
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inputValues,
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filterValues,
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expectedOutputValues,
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biasShape,
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biasValues);
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}
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TEST_SUITE("Convolution3dTest_CpuRefTests")
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{
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TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_CpuRef_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef};
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Conv3DWithBiasesSimpleWithPaddingFp32Test(backends);
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}
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TEST_CASE ("Conv3DWithBiasesStrides_Fp32_CpuRef_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef};
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Conv3DWithBiasesStridesFp32Test(backends);
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}
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TEST_CASE ("Conv3DWithBiasesDilation_Fp32_CpuRef_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef};
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Conv3DWithBiasesDilationFp32Test(backends);
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}
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TEST_CASE ("Conv3DFp32Small_Fp32_CpuRef_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef};
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Conv3DFp32SmallTest(backends);
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}
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} //End of TEST_SUITE("Convolution3dTest_CpuRefTests")
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TEST_SUITE("Convolution3dTest_CpuAccTests")
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{
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TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_CpuAcc_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::CpuAcc};
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Conv3DWithBiasesSimpleWithPaddingFp32Test(backends);
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}
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TEST_CASE ("Conv3DWithBiasesStrides_Fp32_CpuAcc_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::CpuAcc};
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Conv3DWithBiasesStridesFp32Test(backends);
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}
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TEST_CASE ("Conv3DFp32Small_Fp32_CpuAcc_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::CpuAcc};
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Conv3DFp32SmallTest(backends);
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}
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} //End of TEST_SUITE("Convolution3dTest_CpuAccTests")
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TEST_SUITE("Convolution3dTest_GpuAccTests")
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{
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TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_GpuAcc_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::GpuAcc};
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Conv3DWithBiasesSimpleWithPaddingFp32Test(backends);
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}
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TEST_CASE ("Conv3DWithBiasesStrides_Fp32_GpuAcc_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::GpuAcc};
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Conv3DWithBiasesStridesFp32Test(backends);
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}
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TEST_CASE ("Conv3DFp32Small_Fp32_GpuAcc_Test")
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{
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std::vector <armnn::BackendId> backends = {armnn::Compute::GpuAcc};
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Conv3DFp32SmallTest(backends);
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}
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} //End of TEST_SUITE("Convolution3dTest_GpuAccTests")
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#endif
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} // namespace armnnDelegate
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