Files
rk35xx-android14/external/clang/test/CodeGen/arm-asm-variable.c
T
hmz007 36ed224bac Rockchip Anroid14_SDK 20240628-rkr5 (2556df1a)
Signed-off-by: hmz007 <hmz007@gmail.com>
Change-Id: Ib87fdbe7a0be7dc961af3500fe9ea4589a127f9f
2024-10-29 18:12:02 +08:00

33 lines
874 B
C

// REQUIRES: arm-registered-target
// RUN: %clang_cc1 -triple armv7-apple-darwin9 -emit-llvm -w -o - %s | FileCheck %s
typedef long long int64_t;
typedef unsigned int uint32_t;
int64_t foo(int64_t v, volatile int64_t *p)
{
register uint32_t rl asm("r1");
register uint32_t rh asm("r2");
int64_t r;
uint32_t t;
__asm__ __volatile__( \
"ldrexd%[_rl], %[_rh], [%[_p]]" \
: [_rl] "=&r" (rl), [_rh] "=&r" (rh) \
: [_p] "p" (p) : "memory");
// CHECK: call { i32, i32 } asm sideeffect "ldrexd$0, $1, [$2]", "=&{r1},=&{r2},r,~{memory}"(i64*
return r;
}
// Make sure we translate register names properly.
void bar (void) {
register unsigned int rn asm("r14");
register unsigned int d asm("r2");
// CHECK: call i32 asm sideeffect "sub $1, $1, #32", "={r2},{lr}"
asm volatile ("sub %1, %1, #32" : "=r"(d) : "r"(rn));
}