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304 lines
5.3 KiB

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*/
/dts-v1/;
#include "rk3576-nanopi5-common.dtsi"
/ {
model = "FriendlyElec NanoPi R76S";
compatible = "friendlyelec,nanopi-r76s", "rockchip,rk3576";
aliases {
ethernet0 = &r8125_b;
ethernet1 = &r8125_a;
};
gpio_keys: gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key1_pin>;
button@1 {
debounce-interval = <50>;
gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>;
label = "K1";
linux,code = <BTN_1>;
wakeup-source;
};
};
gpio_leds: gpio-leds {
compatible = "gpio-leds";
sys_led: led-0 {
gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
label = "sys_led";
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&sys_led_pin>;
};
lan_led: led-1 {
gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
label = "lan_led";
pinctrl-names = "default";
pinctrl-0 = <&lan_led_pin>;
};
wan_led: led-2 {
gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
label = "wan_led";
pinctrl-names = "default";
pinctrl-0 = <&wan_led_pin>;
};
};
vcc_3v3_pcie20: vcc3v3-pcie20 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_pcie20";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
};
&mach {
hwrev = <0x02>;
model = "NanoPi R76S";
};
&mdio0 {
status = "disabled";
};
&mdio1 {
status = "disabled";
};
&gmac0 {
status = "disabled";
};
&gmac1 {
status = "disabled";
};
&adc1_keys {
status = "disabled";
};
&i2c5 {
status = "okay";
clock-frequency = <200000>;
pinctrl-0 = <&i2c5m3_xfer>;
};
&i2c8 {
clock-frequency = <200000>;
pinctrl-0 = <&i2c8m2_xfer>;
};
&pinctrl {
gpio-key {
key1_pin: key1-pin {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
gpio-leds {
sys_led_pin: sys-led-pin {
rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
lan_led_pin: lan-led-pin {
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
wan_led_pin: wan-led-pin {
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie0_reset_gpio: pcie0-reset-gpio {
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie1_reset_gpio: pcie1-reset-gpio {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pcie0 {
status = "okay";
pinctrl-0 = <&pcie0_reset_gpio>;
phys = <&combphy0_ps PHY_TYPE_PCIE 1>;
reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
rockchip,init-delay-ms = <100>;
rockchip,skip-scan-in-resume;
rockchip,skip-hw-retry;
rockchip,wait-for-link-ms = <1000>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
/delete-property/ prsnt-gpios;
pcie@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
r8125_a: pcie@0,0 {
reg = <0x000000 0 0 0 0>;
local-mac-address = [ 00 00 00 00 00 00 ];
};
};
};
&pcie1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pcie1_reset_gpio>;
reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
rockchip,skip-scan-in-resume;
rockchip,skip-hw-retry;
rockchip,wait-for-link-ms = <1000>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
pcie@0,0 {
reg = <0x00200000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
r8125_b: pcie@20,0 {
reg = <0x000000 0 0 0 0>;
local-mac-address = [ 00 00 00 00 00 00 ];
};
};
};
&sata0 {
status = "disabled";
};
&sdio_pwrseq {
status = "okay";
};
&sdio {
status = "okay";
vqmmc-supply = <&vcc_1v8_s0>;
sd-uhs-sdr104;
#address-cells = <1>;
#size-cells = <0>;
rtl8822cs@1 {
reg = <1>;
compatible = "realtek,rtl8822cs";
};
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer &uart5m0_ctsn &uart5m0_rtsn>;
status = "okay";
bluetooth {
compatible = "realtek,rtl8822cs-bt";
enable-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
host-wake-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
device-wake-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
};
};
&ufs {
status = "disabled";
};
&usbdp_phy_dp {
status = "disabled";
};
&u2phy1 {
status = "disabled";
};
&u2phy1_otg {
status = "disabled";
};
&usb_drd1_dwc3 {
status = "disabled";
};
&vcc5v0_host {
status = "disabled";
};
&vp0 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
1 << ROCKCHIP_VOP2_ESMART2)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
};
&vp1 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 |
1 << ROCKCHIP_VOP2_ESMART3)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
};
&vp2 {
/delete-property/ rockchip,plane-mask;
/delete-property/ rockchip,primary-plane;
status = "disabled";
};
/* GPIO Connector */
&gpio4 {
gpio-line-names =
/* GPIO4 A0-A7 */
"", "",
"", "PIN_03",
"PIN_04 [UART6_TX_M0]", "PIN_05",
"PIN_06 [UART6_RX_M0]", "PIN_07",
/* GPIO4 B0-B7 */
"", "", "", "",
"", "", "", "",
/* GPIO4 C0-C7 */
"", "", "", "",
"", "", "", "",
/* GPIO4 D0-D7 */
"", "", "", "",
"", "", "", "";
};
&i2c4 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
};
&spi0 {
status = "disabled";
spidev0: spidev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <10000000>;
status = "disabled";
};
};
&sai1 {
status = "disabled";
};
&uart6 {
status = "okay";
};