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115 lines
3.6 KiB
115 lines
3.6 KiB
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2023 MediaTek Inc.
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*/
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#ifndef __GZVM_ARCH_COMMON_H__
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#define __GZVM_ARCH_COMMON_H__
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#include <linux/arm-smccc.h>
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enum {
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GZVM_FUNC_CREATE_VM = 0,
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GZVM_FUNC_DESTROY_VM = 1,
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GZVM_FUNC_CREATE_VCPU = 2,
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GZVM_FUNC_DESTROY_VCPU = 3,
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GZVM_FUNC_SET_MEMREGION = 4,
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GZVM_FUNC_RUN = 5,
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GZVM_FUNC_GET_ONE_REG = 8,
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GZVM_FUNC_SET_ONE_REG = 9,
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GZVM_FUNC_IRQ_LINE = 10,
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GZVM_FUNC_CREATE_DEVICE = 11,
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GZVM_FUNC_PROBE = 12,
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GZVM_FUNC_ENABLE_CAP = 13,
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GZVM_FUNC_INFORM_EXIT = 14,
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GZVM_FUNC_MEMREGION_PURPOSE = 15,
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GZVM_FUNC_SET_DTB_CONFIG = 16,
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GZVM_FUNC_MAP_GUEST = 17,
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GZVM_FUNC_MAP_GUEST_BLOCK = 18,
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NR_GZVM_FUNC,
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};
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#define SMC_ENTITY_MTK 59
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#define GZVM_FUNCID_START (0x1000)
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#define GZVM_HCALL_ID(func) \
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ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_32, \
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SMC_ENTITY_MTK, (GZVM_FUNCID_START + (func)))
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#define MT_HVC_GZVM_CREATE_VM GZVM_HCALL_ID(GZVM_FUNC_CREATE_VM)
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#define MT_HVC_GZVM_DESTROY_VM GZVM_HCALL_ID(GZVM_FUNC_DESTROY_VM)
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#define MT_HVC_GZVM_CREATE_VCPU GZVM_HCALL_ID(GZVM_FUNC_CREATE_VCPU)
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#define MT_HVC_GZVM_DESTROY_VCPU GZVM_HCALL_ID(GZVM_FUNC_DESTROY_VCPU)
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#define MT_HVC_GZVM_SET_MEMREGION GZVM_HCALL_ID(GZVM_FUNC_SET_MEMREGION)
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#define MT_HVC_GZVM_RUN GZVM_HCALL_ID(GZVM_FUNC_RUN)
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#define MT_HVC_GZVM_GET_ONE_REG GZVM_HCALL_ID(GZVM_FUNC_GET_ONE_REG)
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#define MT_HVC_GZVM_SET_ONE_REG GZVM_HCALL_ID(GZVM_FUNC_SET_ONE_REG)
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#define MT_HVC_GZVM_IRQ_LINE GZVM_HCALL_ID(GZVM_FUNC_IRQ_LINE)
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#define MT_HVC_GZVM_CREATE_DEVICE GZVM_HCALL_ID(GZVM_FUNC_CREATE_DEVICE)
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#define MT_HVC_GZVM_PROBE GZVM_HCALL_ID(GZVM_FUNC_PROBE)
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#define MT_HVC_GZVM_ENABLE_CAP GZVM_HCALL_ID(GZVM_FUNC_ENABLE_CAP)
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#define MT_HVC_GZVM_INFORM_EXIT GZVM_HCALL_ID(GZVM_FUNC_INFORM_EXIT)
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#define MT_HVC_GZVM_MEMREGION_PURPOSE GZVM_HCALL_ID(GZVM_FUNC_MEMREGION_PURPOSE)
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#define MT_HVC_GZVM_SET_DTB_CONFIG GZVM_HCALL_ID(GZVM_FUNC_SET_DTB_CONFIG)
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#define MT_HVC_GZVM_MAP_GUEST GZVM_HCALL_ID(GZVM_FUNC_MAP_GUEST)
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#define MT_HVC_GZVM_MAP_GUEST_BLOCK GZVM_HCALL_ID(GZVM_FUNC_MAP_GUEST_BLOCK)
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#define GIC_V3_NR_LRS 16
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/**
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* gzvm_hypcall_wrapper() - the wrapper for hvc calls
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* @a0-a7: arguments passed in registers 0 to 7
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* @res: result values from registers 0 to 3
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*
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* Return: The wrapper helps caller to convert geniezone errno to Linux errno.
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*/
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static inline int gzvm_hypcall_wrapper(unsigned long a0, unsigned long a1,
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unsigned long a2, unsigned long a3,
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unsigned long a4, unsigned long a5,
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unsigned long a6, unsigned long a7,
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struct arm_smccc_res *res)
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{
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arm_smccc_hvc(a0, a1, a2, a3, a4, a5, a6, a7, res);
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return gzvm_err_to_errno(res->a0);
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}
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static inline u16 get_vmid_from_tuple(unsigned int tuple)
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{
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return (u16)(tuple >> 16);
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}
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static inline u16 get_vcpuid_from_tuple(unsigned int tuple)
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{
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return (u16)(tuple & 0xffff);
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}
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/**
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* struct gzvm_vcpu_hwstate: Sync architecture state back to host for handling
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* @nr_lrs: The available LRs(list registers) in Soc.
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* @__pad: add an explicit '__u32 __pad;' in the middle to make it clear
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* what the actual layout is.
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* @lr: The array of LRs(list registers).
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*
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* - Keep the same layout of hypervisor data struct.
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* - Sync list registers back for acking virtual device interrupt status.
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*/
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struct gzvm_vcpu_hwstate {
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__le32 nr_lrs;
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__le32 __pad;
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__le64 lr[GIC_V3_NR_LRS];
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};
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static inline unsigned int
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assemble_vm_vcpu_tuple(u16 vmid, u16 vcpuid)
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{
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return ((unsigned int)vmid << 16 | vcpuid);
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}
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static inline void
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disassemble_vm_vcpu_tuple(unsigned int tuple, u16 *vmid, u16 *vcpuid)
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{
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*vmid = get_vmid_from_tuple(tuple);
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*vcpuid = get_vcpuid_from_tuple(tuple);
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}
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#endif /* __GZVM_ARCH_COMMON_H__ */
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