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730 lines
38 KiB
730 lines
38 KiB
/*
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* Copyright (c) 2017-2023 Arm Limited.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef ARM_COMPUTE_TEST_CONVOLUTION_LAYER_FIXTURE
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#define ARM_COMPUTE_TEST_CONVOLUTION_LAYER_FIXTURE
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#include "arm_compute/core/TensorShape.h"
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#include "arm_compute/core/Types.h"
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#include "arm_compute/graph/Utils.h"
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#ifdef ARM_COMPUTE_OPENCL_ENABLED
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#include "arm_compute/runtime/CL/functions/CLGEMMConvolutionLayer.h"
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#endif // ARM_COMPUTE_OPENCL_ENABLED
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#include "arm_compute/runtime/NEON/NEScheduler.h"
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#include "src/core/NEON/kernels/arm_gemm/utils.hpp"
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#include "src/graph/mutators/MutatorUtils.h"
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#include "tests/AssetsLibrary.h"
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#include "tests/Globals.h"
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#include "tests/IAccessor.h"
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#include "tests/framework/Asserts.h"
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#include "tests/framework/Fixture.h"
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#include "tests/validation/Helpers.h"
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#include "tests/validation/reference/ActivationLayer.h"
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#include "tests/validation/reference/ConvolutionLayer.h"
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#include "tests/validation/reference/PadLayer.h"
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#include "tests/validation/reference/Permute.h"
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#include "tests/validation/reference/Utils.h"
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#include <random>
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#include <type_traits>
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namespace arm_compute
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{
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namespace test
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{
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namespace validation
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{
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namespace detail
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{
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template <typename ConvolutionFunction, typename TensorType>
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#ifdef ARM_COMPUTE_OPENCL_ENABLED
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std::enable_if_t<!std::is_same<ConvolutionFunction, CLGEMMConvolutionLayer>::value, void>
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#else // ARM_COMPUTE_OPENCL_ENABLED
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void
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#endif // ARM_COMPUTE_OPENCL_ENABLED
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configure_conv_function(ConvolutionFunction &func,
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TensorType *src, const TensorType *weights, const TensorType *bias, TensorType *dst,
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const PadStrideInfo &info, const WeightsInfo &weights_info,
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const Size2D &dilation, const ActivationLayerInfo &act_info, unsigned int num_groups)
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{
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func.configure(src, weights, bias, dst, info, weights_info, dilation, act_info, false /* enable_fast_math */, num_groups);
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}
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#ifdef ARM_COMPUTE_OPENCL_ENABLED
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template <typename ConvolutionFunction, typename TensorType>
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std::enable_if_t<std::is_same<ConvolutionFunction, CLGEMMConvolutionLayer>::value, void>
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configure_conv_function(ConvolutionFunction &func,
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TensorType *src, const TensorType *weights, const TensorType *bias, TensorType *dst,
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const PadStrideInfo &info, const WeightsInfo &weights_info,
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const Size2D &dilation, const ActivationLayerInfo &act_info, unsigned int num_groups)
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{
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func.configure(src, weights, bias, dst, info, weights_info, dilation, act_info, num_groups);
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}
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#endif // ARM_COMPUTE_OPENCL_ENABLED
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} // namespace detail
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, typename TW>
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class ConvolutionValidationGenericFixture : public framework::Fixture
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{
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public:
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using TBias = typename std::conditional < std::is_same<typename std::decay<T>::type, uint8_t>::value
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|| std::is_same<typename std::decay<T>::type, int8_t>::value,
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int32_t, T >::type;
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public:
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template <typename...>
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void setup(TensorShape input_shape, TensorShape weights_shape, TensorShape bias_shape, TensorShape output_shape, PadStrideInfo info, Size2D dilation, bool reshape_weights,
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DataType data_type, DataType weights_data_type, DataLayout data_layout, QuantizationInfo quantization_info, QuantizationInfo weight_quantization_info, ActivationLayerInfo act_info,
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bool mixed_layout = false, PaddingList pre_pad_layer = PaddingList({}))
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{
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_mixed_layout = mixed_layout;
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_data_type = data_type;
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_weights_data_type = weights_data_type;
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_is_quantized = is_data_type_quantized_asymmetric(data_type);
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_is_bfloat16 = data_type == DataType::BFLOAT16;
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_bias_data_type = _is_quantized ? DataType::S32 : (_is_bfloat16 ? DataType::F32 : data_type);
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_output_data_type = _is_bfloat16 ? DataType::F32 : data_type;
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_quantization_info = quantization_info;
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_weight_quantization_info = weight_quantization_info;
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_data_layout = data_layout;
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_target = compute_target(input_shape, weights_shape, bias_shape, output_shape, info, reshape_weights, dilation, act_info, pre_pad_layer);
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_reference = compute_reference(input_shape, weights_shape, bias_shape, output_shape, info, dilation, act_info, pre_pad_layer);
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}
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protected:
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void mix_layout(FunctionType &layer, TensorType &src, TensorType &dst)
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{
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// Test Multi DataLayout graph cases, when the data layout changes after configure
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src.info()->set_data_layout(_data_layout == DataLayout::NCHW ? DataLayout::NHWC : DataLayout::NCHW);
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dst.info()->set_data_layout(_data_layout == DataLayout::NCHW ? DataLayout::NHWC : DataLayout::NCHW);
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// Compute Convolution function
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layer.run();
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// Reinstating original data layout for the test suite to properly check the values
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src.info()->set_data_layout(_data_layout);
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dst.info()->set_data_layout(_data_layout);
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}
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void regularize_values(void *values, size_t size)
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{
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float *fvalues = static_cast<float *>(values);
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for(size_t i = 0; i < size; ++i)
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{
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fvalues[i] = float(bfloat16(fvalues[i]));
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}
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}
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template <typename U>
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void fill(U &&tensor, int i)
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{
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switch(tensor.data_type())
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{
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case DataType::QASYMM8:
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{
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std::pair<int, int> bounds = get_quantized_bounds(tensor.quantization_info(), -1.0f, 1.0f);
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std::uniform_int_distribution<uint32_t> distribution(bounds.first, bounds.second);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::QASYMM8_SIGNED:
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{
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std::pair<int, int> bounds = get_quantized_qasymm8_signed_bounds(tensor.quantization_info(), -1.0f, 1.0f);
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std::uniform_int_distribution<int32_t> distribution(bounds.first, bounds.second);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::QSYMM8_PER_CHANNEL:
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{
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int min_bound = 128;
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int max_bound = -127;
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for(size_t i = 0; i < _weight_quantization_info.scale().size(); i++)
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{
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std::pair<int, int> bounds = get_symm_quantized_per_channel_bounds(tensor.quantization_info(), -1.0f, 1.0f, i);
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if(bounds.first < min_bound)
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{
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min_bound = bounds.first;
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}
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if(bounds.second > max_bound)
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{
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max_bound = bounds.second;
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}
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}
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std::uniform_int_distribution<int32_t> distribution(min_bound, max_bound);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::S32:
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{
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std::uniform_int_distribution<int32_t> distribution(-100, 100);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::BFLOAT16:
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{
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arm_compute::utils::uniform_real_distribution_16bit<bfloat16> distribution{ -1.0f, 1.0f };
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::F16:
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{
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arm_compute::utils::uniform_real_distribution_16bit<half> distribution{ -1.0f, 1.0f };
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::F32:
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{
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std::uniform_real_distribution<float> distribution(-1.0f, 1.0f);
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library->fill(tensor, distribution, i);
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break;
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}
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default:
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library->fill_tensor_uniform(tensor, i);
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}
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}
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// given input is IN nchw format
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TensorType compute_target(TensorShape input_shape, TensorShape weights_shape, const TensorShape &bias_shape, TensorShape output_shape, const PadStrideInfo &info,
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bool reshape_weights, const Size2D &dilation, const ActivationLayerInfo act_info, PaddingList pre_pad_layer = PaddingList({}))
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{
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ARM_COMPUTE_ERROR_ON((input_shape[2] % weights_shape[2]) != 0);
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const unsigned int num_groups = input_shape[2] / weights_shape[2];
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if(_data_layout == DataLayout::NHWC)
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{
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permute(input_shape, PermutationVector(2U, 0U, 1U));
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permute(weights_shape, PermutationVector(2U, 0U, 1U));
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permute(output_shape, PermutationVector(2U, 0U, 1U));
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if(pre_pad_layer.size() > 0)
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{
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// make sure paddings exist for each c,h,w dimensions
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for(unsigned int i = 0; i < 3 - pre_pad_layer.size(); ++i)
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{
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pre_pad_layer.push_back({ 0, 0 });
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}
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// rotate padding info from nchw to nhwc
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std::rotate(pre_pad_layer.begin(), pre_pad_layer.begin() + 2, pre_pad_layer.begin() + 3);
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}
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}
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const int idx_width = get_data_layout_dimension_index(_data_layout, DataLayoutDimension::WIDTH);
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const int idx_height = get_data_layout_dimension_index(_data_layout, DataLayoutDimension::HEIGHT);
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WeightsInfo weights_info(!reshape_weights, weights_shape[idx_width], weights_shape[idx_height], weights_shape[3]);
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TensorShape reshaped_weights_shape(weights_shape);
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// Create tensors
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TensorType src = create_tensor<TensorType>(input_shape, _data_type, 1, _quantization_info, _data_layout);
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TensorType weights = create_tensor<TensorType>(reshaped_weights_shape, _weights_data_type, 1, _weight_quantization_info, _data_layout);
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TensorType bias = create_tensor<TensorType>(bias_shape, _bias_data_type, 1, _quantization_info, _data_layout);
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TensorType dst = create_tensor<TensorType>(output_shape, _output_data_type, 1, _quantization_info, _data_layout);
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// Create and configure function
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FunctionType conv;
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const unsigned int height_index = arm_compute::graph::get_dimension_idx(_data_layout, DataLayoutDimension::HEIGHT);
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const unsigned int width_index = arm_compute::graph::get_dimension_idx(_data_layout, DataLayoutDimension::WIDTH);
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const PaddingInfo pad_w = width_index < pre_pad_layer.size() ? pre_pad_layer[width_index] : PaddingInfo(0, 0);
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const PaddingInfo pad_h = height_index < pre_pad_layer.size() ? pre_pad_layer[height_index] : PaddingInfo(0, 0);
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if(pre_pad_layer.size() > 0 && arm_compute::graph::is_padding_in_height_or_width(_data_layout, pre_pad_layer))
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{
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// this is the logic implemented in NodeFusionMutator -> fuse_pad_with_convolution
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const PadStrideInfo new_conv_info(
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info.stride().first,
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info.stride().second,
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info.pad_left() + pad_w.first,
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info.pad_right() + pad_w.second,
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info.pad_top() + pad_h.first,
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info.pad_bottom() + pad_h.second,
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info.round());
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detail::configure_conv_function(conv, &src, &weights, &bias, &dst, new_conv_info, weights_info, dilation, act_info, num_groups);
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}
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else
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{
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detail::configure_conv_function(conv, &src, &weights, &bias, &dst, info, weights_info, dilation, act_info, num_groups);
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}
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ARM_COMPUTE_ASSERT(src.info()->is_resizable());
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ARM_COMPUTE_ASSERT(weights.info()->is_resizable());
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ARM_COMPUTE_ASSERT(bias.info()->is_resizable());
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ARM_COMPUTE_ASSERT(dst.info()->is_resizable());
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add_padding_x({ &src, &weights, &bias, &dst }, _data_layout);
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// Allocate tensors
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src.allocator()->allocate();
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weights.allocator()->allocate();
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bias.allocator()->allocate();
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dst.allocator()->allocate();
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ARM_COMPUTE_ASSERT(!src.info()->is_resizable());
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ARM_COMPUTE_ASSERT(!weights.info()->is_resizable());
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ARM_COMPUTE_ASSERT(!bias.info()->is_resizable());
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ARM_COMPUTE_ASSERT(!dst.info()->is_resizable());
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// Fill tensors
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fill(AccessorType(src), 0);
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fill(AccessorType(weights), 1);
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fill(AccessorType(bias), 2);
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if(_mixed_layout)
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{
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mix_layout(conv, src, dst);
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}
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else
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{
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// Compute Convolution function
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conv.run();
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}
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return dst;
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}
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SimpleTensor<T> compute_reference(const TensorShape &input_shape, const TensorShape &weights_shape, const TensorShape &bias_shape, const TensorShape &output_shape, const PadStrideInfo &info,
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const Size2D &dilation, const ActivationLayerInfo act_info, PaddingList pre_pad_layer = PaddingList({}))
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{
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ARM_COMPUTE_ERROR_ON((input_shape[2] % weights_shape[2]) != 0);
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const unsigned int num_groups = input_shape[2] / weights_shape[2];
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// Setup reference data types
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const DataType src_dt = _is_bfloat16 ? DataType::F32 : _data_type;
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const DataType weights_dt = _is_bfloat16 ? DataType::F32 : _weights_data_type;
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const DataType bias_dt = _is_bfloat16 ? DataType::F32 : _bias_data_type;
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// Create reference
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SimpleTensor<T> src{ input_shape, src_dt, 1, _quantization_info };
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SimpleTensor<TW> weights{ weights_shape, weights_dt, 1, _weight_quantization_info };
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SimpleTensor<TBias> bias{ bias_shape, bias_dt, 1, _quantization_info };
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fill(src, 0);
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fill(weights, 1);
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fill(bias, 2);
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// Fill with bfloat16 to perform the conversion and reduce the mismatches in the output
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if(_is_bfloat16)
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{
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regularize_values(static_cast<void *>(src.data()), src.num_elements());
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regularize_values(static_cast<void *>(weights.data()), weights.num_elements());
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}
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if(pre_pad_layer.size() > 0)
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{
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src = reference::pad_layer<T>(src, pre_pad_layer, PixelValue(0), PaddingMode::CONSTANT);
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}
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return (act_info.enabled()) ? reference::activation_layer<T>(reference::convolution_layer<T>(src, weights, bias, output_shape, info, dilation, num_groups),
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act_info) :
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reference::convolution_layer<T>(src, weights, bias, output_shape, info, dilation, num_groups);
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}
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TensorType _target{};
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SimpleTensor<T> _reference{};
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DataType _data_type{};
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DataType _weights_data_type{};
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DataType _bias_data_type{};
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DataType _output_data_type{};
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DataLayout _data_layout{};
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QuantizationInfo _quantization_info{};
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QuantizationInfo _weight_quantization_info{};
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bool _is_quantized = false;
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bool _is_bfloat16 = false;
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bool _mixed_layout = false;
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, bool mixed_layout = false>
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class ConvolutionValidationFixture : public ConvolutionValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>
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{
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public:
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template <typename...>
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void setup(TensorShape input_shape, TensorShape weights_shape, TensorShape bias_shape, TensorShape output_shape, PadStrideInfo info, Size2D dilation, bool reshape_weights, DataType data_type,
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DataLayout data_layout, ActivationLayerInfo act_info)
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{
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ConvolutionValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>::setup(input_shape, weights_shape, bias_shape, output_shape, info, dilation, reshape_weights,
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data_type, data_type, data_layout,
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QuantizationInfo(), QuantizationInfo(), act_info, mixed_layout);
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}
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, bool mixed_layout = false>
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class ConvolutionValidationWithPaddingFixture : public ConvolutionValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>
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{
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public:
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template <typename...>
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void setup(TensorShape input_shape, TensorShape weights_shape, TensorShape bias_shape, TensorShape output_shape, PadStrideInfo info, Size2D dilation, bool reshape_weights, DataType data_type,
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DataLayout data_layout, ActivationLayerInfo act_info, PaddingList pre_pad_layer = PaddingList({}))
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{
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ConvolutionValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>::setup(input_shape, weights_shape, bias_shape, output_shape, info, dilation, reshape_weights,
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data_type, data_type, data_layout,
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QuantizationInfo(), QuantizationInfo(), act_info, mixed_layout, pre_pad_layer);
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}
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, bool mixed_layout = false>
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class ConvolutionValidationQuantizedFixture : public ConvolutionValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>
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{
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public:
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template <typename...>
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void setup(TensorShape input_shape, TensorShape weights_shape, TensorShape bias_shape, TensorShape output_shape, PadStrideInfo info, Size2D dilation, bool reshape_weights, DataType data_type,
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DataLayout data_layout, QuantizationInfo quantization_info, ActivationLayerInfo act_info)
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{
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ConvolutionValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>::setup(input_shape, weights_shape, bias_shape, output_shape, info, dilation, reshape_weights,
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data_type, data_type, data_layout, quantization_info, quantization_info, act_info, mixed_layout);
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}
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, typename TW>
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class ConvolutionValidationQuantizedPerChannelFixture : public ConvolutionValidationGenericFixture<TensorType, AccessorType, FunctionType, T, TW>
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{
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public:
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template <typename...>
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void setup(TensorShape input_shape, TensorShape weights_shape, TensorShape bias_shape, TensorShape output_shape, PadStrideInfo info, Size2D dilation, bool reshape_weights, DataType data_type,
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DataLayout data_layout, QuantizationInfo quantization_info, ActivationLayerInfo act_info, DataType weights_data_type)
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{
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std::vector<float> weights_scales{};
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std::mt19937 gen(library->seed());
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std::uniform_real_distribution<float> dis(0.01f, 1.f);
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for(size_t i = 0; i < output_shape[2]; ++i)
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{
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weights_scales.push_back(dis(gen));
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}
|
|
ConvolutionValidationGenericFixture<TensorType, AccessorType, FunctionType, T, TW>::setup(input_shape, weights_shape, bias_shape, output_shape, info, dilation,
|
|
reshape_weights, data_type, weights_data_type, data_layout,
|
|
quantization_info, QuantizationInfo(weights_scales), act_info);
|
|
}
|
|
};
|
|
|
|
#ifdef ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS
|
|
inline TensorInfo prepare_weights(const TensorInfo tensor_info, const arm_compute::WeightFormat weight_format)
|
|
{
|
|
const DataLayout data_layout = tensor_info.data_layout();
|
|
ARM_COMPUTE_EXPECT(data_layout == DataLayout::NHWC, framework::LogLevel::ERRORS);
|
|
const DataType data_type = tensor_info.data_type();
|
|
const TensorShape tensor_shape = tensor_info.tensor_shape();
|
|
const int N = tensor_shape[get_data_layout_dimension_index(data_layout, DataLayoutDimension::BATCHES)]; // N=O
|
|
const int H = tensor_shape[get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT)];
|
|
const int W = tensor_shape[get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH)];
|
|
const int C = tensor_shape[get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL)]; // C=I
|
|
|
|
const int interleave_by = arm_compute::interleave_by(weight_format);
|
|
const int block_by = arm_compute::block_by(weight_format);
|
|
const int Ip = arm_gemm::roundup<unsigned int>(C, block_by); // C'=I'
|
|
const int Op = arm_gemm::roundup<unsigned int>(N, interleave_by); // O'=N'
|
|
|
|
arm_compute::Strides strides_in_bytes = tensor_info.strides_in_bytes();
|
|
strides_in_bytes.set(1, Ip * interleave_by * H * W * tensor_info.element_size());
|
|
strides_in_bytes.set(2, Ip * Op * tensor_info.element_size());
|
|
|
|
const size_t offset_first_element_in_bytes = tensor_info.offset_first_element_in_bytes();
|
|
|
|
// Total size needs to include padded dimensions
|
|
const size_t total_size_in_bytes = Op * H * W * Ip * tensor_info.element_size();
|
|
|
|
const TensorShape TS(Ip, W, H, Op);
|
|
|
|
TensorInfo new_tensor_info = tensor_info;
|
|
new_tensor_info.init(TS, 1 /*num_channels, deprecated*/, data_type, strides_in_bytes,
|
|
offset_first_element_in_bytes, total_size_in_bytes);
|
|
return new_tensor_info;
|
|
}
|
|
|
|
template <typename ScalarType, typename AccessorType>
|
|
inline void rearrange_data(const AccessorType src, AccessorType dst, const arm_compute::WeightFormat weight_format)
|
|
{
|
|
ARM_COMPUTE_EXPECT(arm_compute::is_fixed_format(weight_format), framework::LogLevel::ERRORS);
|
|
// Data Layout: OHWIo<interleave_by>i<block_by>
|
|
const int interleave_by = arm_compute::interleave_by(weight_format);
|
|
const int block_by = arm_compute::block_by(weight_format);
|
|
const TensorShape src_tensor_shape = src.shape();
|
|
const DataLayout data_layout = src.data_layout();
|
|
ARM_COMPUTE_EXPECT(data_layout == DataLayout::NHWC, framework::LogLevel::ERRORS);
|
|
const unsigned int O = src_tensor_shape[get_data_layout_dimension_index(data_layout, DataLayoutDimension::BATCHES)]; // N=O
|
|
const unsigned int H = src_tensor_shape[get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT)];
|
|
const unsigned int W = src_tensor_shape[get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH)];
|
|
const unsigned int I = src_tensor_shape[get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL)]; // C=I
|
|
const unsigned int Ip = arm_gemm::roundup<unsigned int>(I, block_by); // C'=I'
|
|
const unsigned int Op = arm_gemm::roundup<unsigned int>(O, interleave_by); // N'=O'
|
|
|
|
ARM_COMPUTE_EXPECT_EQUAL(Op * H * W * Ip, (unsigned)dst.num_elements(), framework::LogLevel::ERRORS);
|
|
ARM_COMPUTE_EXPECT(src.num_elements() <= dst.num_elements(), framework::LogLevel::ERRORS);
|
|
|
|
const ScalarType *src_ptr = reinterpret_cast<const ScalarType *>(src.data());
|
|
ScalarType *dst_ptr = reinterpret_cast<ScalarType *>(dst.data());
|
|
for(unsigned i = 0; i < I; ++i)
|
|
for(unsigned w = 0; w < W; ++w)
|
|
for(unsigned h = 0; h < H; ++h)
|
|
for(unsigned o = 0; o < O; ++o)
|
|
{
|
|
ScalarType src_element;
|
|
switch(data_layout)
|
|
{
|
|
case DataLayout::NHWC:
|
|
{
|
|
src_element = src_ptr[o * H * W * I + h * W * I + w * I + i];
|
|
}
|
|
break;
|
|
default:
|
|
{
|
|
ARM_COMPUTE_ERROR("Unsupported memory layout.");
|
|
}
|
|
}
|
|
const int x5 = std::floor(((float)o) / interleave_by);
|
|
const int x4 = h;
|
|
const int x3 = w;
|
|
const int x2 = std::floor((float)i / block_by);
|
|
const int x1 = o % interleave_by;
|
|
const int x0 = i % block_by;
|
|
unsigned dst_idx = x5 * H * W * Ip * interleave_by
|
|
+ x4 * W * Ip * interleave_by
|
|
+ x3 * Ip * interleave_by
|
|
+ x2 * interleave_by * block_by
|
|
+ x1 * block_by
|
|
+ x0;
|
|
dst_ptr[dst_idx] = src_element;
|
|
}
|
|
}
|
|
|
|
template <typename ConvolutionFunction, typename TensorClass, typename AccessorType, typename ScalarType, bool enable_fast_math>
|
|
class VariableWeightsFixtureBaseClass : public framework::Fixture
|
|
{
|
|
public:
|
|
template <typename...>
|
|
void setup(TensorShape input_shape, TensorShape weights_shape, TensorShape bias_shape, TensorShape output_shape, PadStrideInfo info, Size2D dilation, DataLayout data_layout,
|
|
const DataType data_type)
|
|
{
|
|
conv = std::make_unique<ConvolutionFunction>();
|
|
// prepare data
|
|
_data_layout = data_layout;
|
|
// Fixed format kernels for variable weights can work only with NHWC format.
|
|
ARM_COMPUTE_EXPECT_EQUAL(_data_layout, DataLayout::NHWC, framework::LogLevel::ERRORS);
|
|
_data_type = data_type;
|
|
// run the code
|
|
compute_target(input_shape, weights_shape, bias_shape, output_shape, info, dilation);
|
|
compute_reference(input_shape, weights_shape, bias_shape, output_shape, info, dilation);
|
|
}
|
|
void teardown()
|
|
{
|
|
_target.allocator()->free();
|
|
}
|
|
|
|
protected:
|
|
template <typename U>
|
|
void fill(U &&tensor, int i)
|
|
{
|
|
switch(tensor.data_type())
|
|
{
|
|
case DataType::F16:
|
|
{
|
|
arm_compute::utils::uniform_real_distribution_16bit<half> distribution{ -1.0f, 1.0f };
|
|
library->fill(tensor, distribution, i);
|
|
break;
|
|
}
|
|
case DataType::F32:
|
|
{
|
|
std::uniform_real_distribution<float> distribution(-1.0f, 1.0f);
|
|
library->fill(tensor, distribution, i);
|
|
break;
|
|
}
|
|
default:
|
|
library->fill_tensor_uniform(tensor, i);
|
|
}
|
|
}
|
|
|
|
private:
|
|
virtual void configure_and_execute_kernel(TensorInfo src_tensor_info, TensorInfo weight_tensor_info, TensorInfo bias_tensor_info, TensorInfo dst_tensor_info, const WeightsInfo weights_info,
|
|
const PadStrideInfo &conv_info,
|
|
const Size2D &dilation) = 0;
|
|
|
|
void compute_target(TensorShape input_shape, TensorShape weights_shape, const TensorShape &bias_shape, TensorShape output_shape, const PadStrideInfo &conv_info,
|
|
const Size2D &dilation)
|
|
{
|
|
// The dataset is always in NCHW format - we need to make C the
|
|
// innermost dimension because the fixed-format kernel work only
|
|
// with NHWC layout.
|
|
permute(input_shape, PermutationVector(2U, 0U, 1U));
|
|
permute(weights_shape, PermutationVector(2U, 0U, 1U));
|
|
permute(output_shape, PermutationVector(2U, 0U, 1U));
|
|
const auto src_tensor_info = TensorInfo(input_shape, 1, _data_type, _data_layout);
|
|
const auto weight_tensor_info = TensorInfo(weights_shape, 1, _data_type, _data_layout);
|
|
const auto bias_tensor_info = TensorInfo(bias_shape, 1, _data_type, _data_layout);
|
|
auto dst_tensor_info = TensorInfo(output_shape, 1, _data_type, _data_layout);
|
|
|
|
const int kernel_height = weights_shape[get_data_layout_dimension_index(_data_layout, DataLayoutDimension::HEIGHT)];
|
|
const int kernel_width = weights_shape[get_data_layout_dimension_index(_data_layout, DataLayoutDimension::WIDTH)];
|
|
const int num_kernels = weights_shape[get_data_layout_dimension_index(_data_layout, DataLayoutDimension::BATCHES)];
|
|
|
|
const WeightsInfo query_weights_info(/*reshape_weights*/ false, kernel_width, kernel_height, num_kernels, false, arm_compute::WeightFormat::ANY);
|
|
const bool kernel_found = bool(ConvolutionFunction::has_opt_impl(_computed_weight_format, &src_tensor_info, &weight_tensor_info,
|
|
&bias_tensor_info, &dst_tensor_info, conv_info, query_weights_info));
|
|
// Make surethat the setup founds a fixed-format kernel as requested by the test case.
|
|
ARM_COMPUTE_EXPECT(kernel_found, framework::LogLevel::ERRORS);
|
|
ARM_COMPUTE_EXPECT(arm_compute::is_fixed_format(_computed_weight_format), framework::LogLevel::ERRORS);
|
|
|
|
const WeightsInfo weights_info(/*reshape_weights*/ false, kernel_width, kernel_height, num_kernels, false, _computed_weight_format);
|
|
configure_and_execute_kernel(src_tensor_info, weight_tensor_info, bias_tensor_info, dst_tensor_info, weights_info, conv_info,
|
|
dilation);
|
|
}
|
|
void compute_reference(const TensorShape &input_shape, const TensorShape &weights_shape, const TensorShape &bias_shape, const TensorShape &output_shape, const PadStrideInfo &info,
|
|
const Size2D &dilation)
|
|
{
|
|
ARM_COMPUTE_UNUSED(input_shape, weights_shape, bias_shape, output_shape, info,
|
|
dilation);
|
|
|
|
// Create reference
|
|
SimpleTensor<ScalarType> src{ input_shape, _data_type };
|
|
SimpleTensor<ScalarType> weights{ weights_shape, _data_type };
|
|
SimpleTensor<ScalarType> bias{ bias_shape, _data_type };
|
|
fill(src, 0);
|
|
fill(bias, 1);
|
|
fill(weights, 3);
|
|
_reference = reference::convolution_layer<ScalarType>(src, weights, bias, output_shape, info, dilation, 1 /*num_groups*/);
|
|
}
|
|
DataLayout _data_layout{};
|
|
DataType _data_type{};
|
|
|
|
protected:
|
|
std::unique_ptr<ConvolutionFunction> conv{};
|
|
arm_compute::WeightFormat _computed_weight_format{ arm_compute::WeightFormat::UNSPECIFIED };
|
|
TensorClass _target{};
|
|
SimpleTensor<ScalarType> _reference{};
|
|
};
|
|
|
|
template <typename ConvolutionFunction, typename TensorClass, typename AccessorType, typename ScalarType, bool enable_fast_math>
|
|
class VariableWeightsFixture : public VariableWeightsFixtureBaseClass<ConvolutionFunction, TensorClass, AccessorType, ScalarType, enable_fast_math>
|
|
{
|
|
void configure_and_execute_kernel(TensorInfo src_tensor_info, TensorInfo weight_tensor_info, TensorInfo bias_tensor_info, TensorInfo dst_tensor_info, const WeightsInfo weights_info,
|
|
const PadStrideInfo &conv_info,
|
|
const Size2D &dilation)
|
|
{
|
|
this->conv->configure(&src_tensor_info, &weight_tensor_info, &bias_tensor_info, &dst_tensor_info, conv_info, weights_info, dilation, ActivationLayerInfo(), enable_fast_math);
|
|
|
|
// Allocate input tensors
|
|
auto src = create_tensor<TensorClass>(src_tensor_info);
|
|
auto weights_original = create_tensor<TensorClass>(weight_tensor_info);
|
|
const TensorInfo new_tensor_info = prepare_weights(weight_tensor_info, this->_computed_weight_format);
|
|
auto weights_transformed = create_tensor<TensorClass>(new_tensor_info);
|
|
auto bias = create_tensor<TensorClass>(bias_tensor_info);
|
|
src.allocator()->allocate();
|
|
weights_original.allocator()->allocate();
|
|
weights_transformed.allocator()->allocate();
|
|
bias.allocator()->allocate();
|
|
// Allocate destination tensor
|
|
this->_target = create_tensor<TensorClass>(dst_tensor_info);
|
|
this->_target.allocator()->allocate();
|
|
|
|
// Prepare source and biases that are left unchanged.
|
|
this->fill(AccessorType(src), 0);
|
|
this->fill(AccessorType(bias), 1);
|
|
|
|
// First run
|
|
this->fill(AccessorType(weights_original), 2);
|
|
rearrange_data<ScalarType, AccessorType>(AccessorType(weights_original), AccessorType(weights_transformed), this->_computed_weight_format);
|
|
ITensorPack run_pack{ { TensorType::ACL_SRC_0, &src }, { TensorType::ACL_SRC_1, &weights_transformed }, { TensorType::ACL_SRC_2, &bias }, { TensorType::ACL_DST, &(this->_target) } };
|
|
this->conv->run(run_pack);
|
|
// Second run, with new weights
|
|
this->fill(AccessorType(weights_original), 3);
|
|
rearrange_data<ScalarType, AccessorType>(AccessorType(weights_original), AccessorType(weights_transformed), this->_computed_weight_format);
|
|
this->conv->run(run_pack);
|
|
src.allocator()->free();
|
|
weights_original.allocator()->free();
|
|
weights_transformed.allocator()->free();
|
|
bias.allocator()->free();
|
|
}
|
|
};
|
|
|
|
template <typename ConvolutionFunction, typename TensorClass, typename AccessorType, typename ScalarType, bool enable_fast_math>
|
|
class VariableWeightsFixtureNEInterface : public VariableWeightsFixtureBaseClass<ConvolutionFunction, TensorClass, AccessorType, ScalarType, enable_fast_math>
|
|
{
|
|
void configure_and_execute_kernel(TensorInfo src_tensor_info, TensorInfo weight_tensor_info, TensorInfo bias_tensor_info, TensorInfo dst_tensor_info, const WeightsInfo weights_info,
|
|
const PadStrideInfo &conv_info,
|
|
const Size2D &dilation)
|
|
{
|
|
// Allocate input tensors
|
|
auto src = create_tensor<TensorClass>(src_tensor_info);
|
|
auto weights_original = create_tensor<TensorClass>(weight_tensor_info);
|
|
const TensorInfo new_tensor_info = prepare_weights(weight_tensor_info, this->_computed_weight_format);
|
|
auto weights_transformed = create_tensor<TensorClass>(new_tensor_info);
|
|
auto bias = create_tensor<TensorClass>(bias_tensor_info);
|
|
src.allocator()->allocate();
|
|
weights_original.allocator()->allocate();
|
|
weights_transformed.allocator()->allocate();
|
|
bias.allocator()->allocate();
|
|
// Allocate destination tensor
|
|
this->_target = create_tensor<TensorClass>(dst_tensor_info);
|
|
this->_target.allocator()->allocate();
|
|
this->conv->configure(&src, &weights_transformed, &bias, &(this->_target), conv_info, weights_info, dilation, ActivationLayerInfo(), enable_fast_math);
|
|
// Prepare source and biases that are left unchanged.
|
|
this->fill(AccessorType(src), 0);
|
|
this->fill(AccessorType(bias), 1);
|
|
|
|
// First run
|
|
this->fill(AccessorType(weights_original), 2);
|
|
rearrange_data<ScalarType, AccessorType>(AccessorType(weights_original), AccessorType(weights_transformed), this->_computed_weight_format);
|
|
this->conv->run();
|
|
// Second run, with new weights
|
|
this->fill(AccessorType(weights_original), 3);
|
|
rearrange_data<ScalarType, AccessorType>(AccessorType(weights_original), AccessorType(weights_transformed), this->_computed_weight_format);
|
|
this->conv->run();
|
|
src.allocator()->free();
|
|
weights_original.allocator()->free();
|
|
weights_transformed.allocator()->free();
|
|
bias.allocator()->free();
|
|
}
|
|
};
|
|
|
|
template <typename ConvolutionClass, bool enable_fast_math>
|
|
class HasOptImplFixture : public framework::Fixture
|
|
{
|
|
public:
|
|
template <typename...>
|
|
void setup(DataType data_type, arm_compute::WeightFormat query_weight_format)
|
|
{
|
|
auto conv = std::make_unique<ConvolutionClass>();
|
|
const auto src_info = TensorInfo(TensorShape(56U, 56U, 64U), 1, data_type, DataLayout::NHWC);
|
|
const auto weight_info = TensorInfo(TensorShape(64, 3U, 3U, 64U), 1, enable_fast_math ? DataType::BFLOAT16 : data_type, DataLayout::NHWC);
|
|
const auto bias_info = TensorInfo(TensorShape(64U), 1, data_type, DataLayout::NHWC);
|
|
auto dst_info = TensorInfo(TensorShape(56U, 56U, 64U), 1, data_type, DataLayout::NHWC);
|
|
const auto conv_info = PadStrideInfo(1, 1, 1, 1, 1, 1, DimensionRoundingType::FLOOR);
|
|
const WeightsInfo weights_info(false, 3U, 3U, 64U, false, query_weight_format);
|
|
_kernel_found = bool(ConvolutionClass::has_opt_impl(_computed_weight_format, &src_info, &weight_info,
|
|
&bias_info, &dst_info, conv_info, weights_info,
|
|
/*dilation*/ Size2D(1U, 1U), /*act_info*/ ActivationLayerInfo(), enable_fast_math));
|
|
}
|
|
|
|
protected:
|
|
bool _kernel_found{ false };
|
|
arm_compute::WeightFormat _computed_weight_format{ arm_compute::WeightFormat::UNSPECIFIED };
|
|
};
|
|
#endif // ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS
|
|
|
|
} // namespace validation
|
|
} // namespace test
|
|
} // namespace arm_compute
|
|
#endif /* ARM_COMPUTE_TEST_CONVOLUTION_LAYER_FIXTURE */
|