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682 lines
28 KiB
682 lines
28 KiB
/*
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* Copyright (c) 2017-2022 Arm Limited.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef ARM_COMPUTE_TEST_DEPTHWISE_CONVOLUTION_FIXTURE
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#define ARM_COMPUTE_TEST_DEPTHWISE_CONVOLUTION_FIXTURE
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#include "arm_compute/core/TensorShape.h"
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#include "arm_compute/core/Types.h"
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#include "arm_compute/core/utils/misc/ShapeCalculator.h"
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#include "tests/AssetsLibrary.h"
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#include "tests/Globals.h"
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#include "tests/IAccessor.h"
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#include "tests/framework/Asserts.h"
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#include "tests/framework/Fixture.h"
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#include "tests/validation/Helpers.h"
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#include "tests/validation/reference/ActivationLayer.h"
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#include "tests/validation/reference/DepthwiseConvolutionLayer.h"
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#include "utils/Utils.h"
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#include <random>
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namespace arm_compute
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{
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namespace test
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{
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namespace validation
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{
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using namespace arm_compute::misc::shape_calculator;
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, typename TW>
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class DepthwiseConvolutionLayerValidationGenericFixture : public framework::Fixture
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{
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public:
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using TBias = typename std::conditional < std::is_same<T, uint8_t>::value || std::is_same<T, int8_t>::value, int32_t, T >::type;
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public:
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template <typename...>
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void setup(TensorShape in_shape, Size2D kernel_size, PadStrideInfo pad_stride_info, Size2D dilation,
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unsigned int depth_multiplier, DataType input_data_type, DataType weights_data_type,
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QuantizationInfo input_quantization_info, QuantizationInfo weights_quantization_info, QuantizationInfo output_quantization_info,
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DataLayout data_layout, ActivationLayerInfo act_info, bool mixed_layout = false, bool in_place = false, bool run_twice = false)
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{
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ARM_COMPUTE_ERROR_ON(mixed_layout && in_place);
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_mixed_layout = mixed_layout;
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_input_shape = in_shape;
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_input_data_type = input_data_type;
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_weights_data_type = weights_data_type;
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_input_quantization_info = input_quantization_info;
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_weights_quantization_info = weights_quantization_info;
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_output_quantization_info = output_quantization_info;
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_data_layout = data_layout;
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_pad_stride_info = pad_stride_info;
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_act_info = act_info;
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_depth_multiplier = depth_multiplier;
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_dilation = dilation;
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_in_place = in_place;
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_run_twice = run_twice;
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_bias_data_type = is_data_type_quantized(_input_data_type) ? DataType::S32 : _input_data_type;
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_weights_shape = TensorShape(kernel_size.width, kernel_size.height);
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const TensorInfo in_info(_input_shape, 1, _input_data_type);
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const TensorInfo we_info(_weights_shape, 1, _weights_data_type);
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const ConvolutionInfo info{ _pad_stride_info, _depth_multiplier, _act_info, _dilation };
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_output_shape = compute_depthwise_convolution_shape(in_info, we_info, info);
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_weights_shape.set(2, _output_shape.z());
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_biases_shape = TensorShape(_weights_shape[2]);
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}
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void configure_target()
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{
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TensorShape input_shape = _input_shape;
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TensorShape weights_shape = _weights_shape;
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TensorShape output_shape = _output_shape;
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if(_data_layout == DataLayout::NHWC)
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{
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permute(input_shape, PermutationVector(2U, 0U, 1U));
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permute(weights_shape, PermutationVector(2U, 0U, 1U));
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permute(output_shape, PermutationVector(2U, 0U, 1U));
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}
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// Create tensors
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_src = create_tensor<TensorType>(input_shape, _input_data_type, 1, _input_quantization_info, _data_layout);
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_weights = create_tensor<TensorType>(weights_shape, _weights_data_type, 1, _weights_quantization_info, _data_layout);
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if(_run_twice) {
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_weights.info()->set_are_values_constant(false);
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}
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_biases = create_tensor<TensorType>(_biases_shape, _bias_data_type, 1, _input_quantization_info, _data_layout);
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TensorType *target_to_use = nullptr;
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if(!_in_place)
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{
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_target = create_tensor<TensorType>(output_shape, _input_data_type, 1, _output_quantization_info, _data_layout);
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target_to_use = &_target;
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}
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add_padding_x({ &_src, &_biases }, _data_layout);
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add_padding_x({ &_weights }, _data_layout, true);
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if(!_in_place)
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{
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add_padding_x({ &_target }, _data_layout);
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}
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// Create Depthwise Convolution configure function
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_dwc.configure(&_src, &_weights, &_biases, target_to_use, _pad_stride_info, _depth_multiplier, _act_info, _dilation);
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ARM_COMPUTE_ASSERT(_src.info()->is_resizable());
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ARM_COMPUTE_ASSERT(_weights.info()->is_resizable());
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ARM_COMPUTE_ASSERT(_biases.info()->is_resizable());
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ARM_COMPUTE_ASSERT(_target.info()->is_resizable());
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}
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void allocate_and_run_target()
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{
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// Allocate tensors
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_src.allocator()->allocate();
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_weights.allocator()->allocate();
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_biases.allocator()->allocate();
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ARM_COMPUTE_ASSERT(!_src.info()->is_resizable());
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ARM_COMPUTE_ASSERT(!_weights.info()->is_resizable());
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ARM_COMPUTE_ASSERT(!_biases.info()->is_resizable());
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if(!_in_place)
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{
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_target.allocator()->allocate();
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ARM_COMPUTE_ASSERT(!_target.info()->is_resizable());
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}
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// Fill tensors
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fill(AccessorType(_src), 0);
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fill(AccessorType(_weights), 1);
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fill(AccessorType(_biases), 2);
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// Run with variable input
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if(_run_twice) {
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_dwc.run();
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// Fill tensors with a new seed
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fill(AccessorType(_src), 3);
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fill(AccessorType(_weights), 4);
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fill(AccessorType(_biases), 5);
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}
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if(_mixed_layout)
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{
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mix_layout(_dwc, _src, _target);
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}
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else
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{
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// Compute function
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_dwc.run();
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}
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}
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void compute_reference()
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{
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SimpleTensor<T> src{ _input_shape, _input_data_type, 1, _input_quantization_info };
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SimpleTensor<TW> weights{ _weights_shape, _weights_data_type, 1, _weights_quantization_info };
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SimpleTensor<TBias> biases{ _biases_shape, _bias_data_type, 1, _input_quantization_info };
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fill(src, 0);
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fill(weights, 1);
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fill(biases, 2);
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if(_run_twice) {
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SimpleTensor<T> depth_out = reference::depthwise_convolution(src, weights, biases, _output_shape, _pad_stride_info, _depth_multiplier, _dilation, _output_quantization_info);
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if(_act_info.enabled()) {
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reference::activation_layer<T>(depth_out, _act_info);
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}
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fill(src, 3);
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fill(weights, 4);
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fill(biases, 5);
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}
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SimpleTensor<T> depth_out = reference::depthwise_convolution(src, weights, biases, _output_shape, _pad_stride_info, _depth_multiplier, _dilation, _output_quantization_info);
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_reference = (_act_info.enabled()) ? reference::activation_layer<T>(depth_out, _act_info) : depth_out;
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}
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protected:
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void mix_layout(FunctionType &layer, TensorType &src, TensorType &dst)
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{
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ARM_COMPUTE_ERROR_ON(_in_place);
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// Test Multi DataLayout graph cases, when the data layout changes after configure
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src.info()->set_data_layout(_data_layout == DataLayout::NCHW ? DataLayout::NHWC : DataLayout::NCHW);
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dst.info()->set_data_layout(_data_layout == DataLayout::NCHW ? DataLayout::NHWC : DataLayout::NCHW);
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// Compute Convolution function
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layer.run();
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// Reinstating original data layout for the test suite to properly check the values
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src.info()->set_data_layout(_data_layout);
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dst.info()->set_data_layout(_data_layout);
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}
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template <typename U>
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void fill(U &&tensor, int i)
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{
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switch(tensor.data_type())
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{
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case DataType::QASYMM8:
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{
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std::uniform_int_distribution<uint32_t> distribution(0, 15);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::QASYMM8_SIGNED:
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case DataType::QSYMM8_PER_CHANNEL:
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{
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std::uniform_int_distribution<int32_t> distribution(-10, 10);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::F16:
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{
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arm_compute::utils::uniform_real_distribution_16bit<half> distribution{ -1.0f, 1.0f };
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::F32:
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{
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std::uniform_real_distribution<float> distribution(-1.0f, 1.0f);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::S32:
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{
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std::uniform_int_distribution<int32_t> distribution(-100, 100);
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library->fill(tensor, distribution, i);
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break;
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}
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default:
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library->fill_tensor_uniform(tensor, i);
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}
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}
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TensorType _target{};
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SimpleTensor<T> _reference{};
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TensorType _src{};
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TensorType _weights{};
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TensorType _biases{};
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FunctionType _dwc{};
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TensorShape _input_shape{};
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TensorShape _weights_shape{};
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TensorShape _biases_shape{};
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TensorShape _output_shape{};
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DataType _input_data_type{};
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DataType _weights_data_type{};
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DataType _bias_data_type{};
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QuantizationInfo _input_quantization_info{};
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QuantizationInfo _weights_quantization_info{};
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QuantizationInfo _output_quantization_info{};
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DataLayout _data_layout{};
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PadStrideInfo _pad_stride_info{};
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ActivationLayerInfo _act_info{};
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unsigned int _depth_multiplier{};
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Size2D _dilation{};
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bool _mixed_layout{ false };
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bool _in_place{ false };
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bool _run_twice{ false };
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, bool mixed_layout = false, bool in_place = false, bool run_twice = false>
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class DepthwiseConvolutionLayerValidationFixture : public DepthwiseConvolutionLayerValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>
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{
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public:
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template <typename...>
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void setup(TensorShape in_shape, Size2D kernel_size, PadStrideInfo pad_stride_info, Size2D dilation, unsigned int depth_multiplier, DataType data_type, DataLayout data_layout,
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ActivationLayerInfo act_info)
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{
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DepthwiseConvolutionLayerValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>::setup(in_shape, kernel_size, pad_stride_info, dilation, depth_multiplier,
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data_type, data_type, QuantizationInfo(), QuantizationInfo(), QuantizationInfo(),
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data_layout, act_info, mixed_layout, in_place, run_twice);
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}
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T>
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class DepthwiseConvolutionLayerNativeValidationFixture : public DepthwiseConvolutionLayerValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>
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{
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public:
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template <typename...>
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void setup(size_t width, size_t height, size_t channel, size_t batch, Size2D kernel_size, size_t depth_multiplier, Size2D dilation, Size2D stride, bool padding_valid, DataType data_type,
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DataLayout data_layout)
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{
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_dilation = dilation;
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_depth_multiplier = depth_multiplier;
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_data_type = data_type;
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_data_layout = data_layout;
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_input_shape = TensorShape(width, height, channel, batch);
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_weights_shape = TensorShape(kernel_size.width, kernel_size.height, channel * _depth_multiplier);
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_biases_shape = TensorShape(_weights_shape.z());
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if(padding_valid)
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{
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_conv_info = PadStrideInfo(stride.width, stride.height);
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}
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else
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{
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_conv_info = calculate_same_pad(_input_shape, _weights_shape, PadStrideInfo(stride.width, stride.height), DataLayout::NCHW, _dilation);
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}
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}
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void configure_target()
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{
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TensorShape input_shape = _input_shape;
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TensorShape weights_shape = _weights_shape;
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if(_data_layout == DataLayout::NHWC)
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{
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permute(input_shape, PermutationVector(2U, 0U, 1U));
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permute(weights_shape, PermutationVector(2U, 0U, 1U));
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}
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// Create tensors
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_src = create_tensor<TensorType>(input_shape, _data_type, 1, QuantizationInfo(), _data_layout);
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_weights = create_tensor<TensorType>(weights_shape, _data_type, 1, QuantizationInfo(), _data_layout);
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_biases = create_tensor<TensorType>(_biases_shape, _data_type, 1, QuantizationInfo(), _data_layout);
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_target = create_tensor<TensorType>(TensorShape(), _data_type, 1, QuantizationInfo(), _data_layout);
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add_padding_x({ &_src, &_biases, &_target }, _data_layout);
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add_padding_x({ &_weights }, _data_layout, true);
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add_padding_y({ &_src, &_target }, _data_layout);
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// Create Depthwise Convolution configure function
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const ConvolutionInfo info
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{
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_conv_info, _depth_multiplier, ActivationLayerInfo(), _dilation
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};
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_dwc.configure(_src.info(), _weights.info(), _biases.info(), _target.info(), info);
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ARM_COMPUTE_ASSERT(_src.info()->is_resizable());
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ARM_COMPUTE_ASSERT(_weights.info()->is_resizable());
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ARM_COMPUTE_ASSERT(_biases.info()->is_resizable());
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ARM_COMPUTE_ASSERT(_target.info()->is_resizable());
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}
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void allocate_and_run_target()
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{
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// Allocate tensors
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_src.allocator()->allocate();
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_weights.allocator()->allocate();
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_biases.allocator()->allocate();
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_target.allocator()->allocate();
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ARM_COMPUTE_ASSERT(!_src.info()->is_resizable());
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ARM_COMPUTE_ASSERT(!_weights.info()->is_resizable());
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ARM_COMPUTE_ASSERT(!_biases.info()->is_resizable());
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ARM_COMPUTE_ASSERT(!_target.info()->is_resizable());
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// Fill tensors
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fill(AccessorType(_src), 0);
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fill(AccessorType(_weights), 1);
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fill(AccessorType(_biases), 2);
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arm_compute::ITensorPack pack;
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pack.add_const_tensor(arm_compute::TensorType::ACL_SRC_0, &_src);
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pack.add_const_tensor(arm_compute::TensorType::ACL_SRC_1, &_weights);
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pack.add_const_tensor(arm_compute::TensorType::ACL_SRC_2, &_biases);
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pack.add_tensor(arm_compute::TensorType::ACL_DST, &_target);
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// Compute function
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_dwc.run(pack);
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}
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void compute_reference()
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{
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SimpleTensor<T> src{ _input_shape, _data_type };
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SimpleTensor<T> weights{ _weights_shape, _data_type };
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SimpleTensor<T> biases{ _biases_shape, _data_type };
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fill(src, 0);
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fill(weights, 1);
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fill(biases, 2);
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const ConvolutionInfo info{ _conv_info, _depth_multiplier, ActivationLayerInfo(), _dilation };
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const TensorShape dst_shape = compute_depthwise_convolution_shape(TensorInfo(_input_shape, 1, _data_type), TensorInfo(_weights_shape, 1, _data_type), info);
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_reference = reference::depthwise_convolution(src, weights, biases, dst_shape, _conv_info, _depth_multiplier, _dilation);
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}
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protected:
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template <typename U>
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void fill(U &&tensor, int i)
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{
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switch(tensor.data_type())
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{
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case DataType::F32:
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{
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std::uniform_real_distribution<float> distribution(-1.0f, 1.0f);
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library->fill(tensor, distribution, i);
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break;
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}
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default:
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library->fill_tensor_uniform(tensor, i);
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}
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}
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TensorType _target{};
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SimpleTensor<T> _reference{};
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TensorType _src{};
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TensorType _weights{};
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TensorType _biases{};
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FunctionType _dwc{};
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TensorShape _input_shape{};
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TensorShape _weights_shape{};
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TensorShape _biases_shape{};
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DataType _data_type{};
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DataLayout _data_layout{};
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PadStrideInfo _conv_info{};
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Size2D _dilation{};
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unsigned int _depth_multiplier{};
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, bool in_place = false>
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class DepthwiseConvolutionLayerNativeConfigurableValidationFixture : public DepthwiseConvolutionLayerValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>
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{
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public:
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template <typename...>
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void setup(size_t width, size_t height, size_t channel, size_t batch, Size2D kernel_size, size_t depth_multiplier, Size2D dilation, Size2D stride, bool padding_valid, DataType data_type,
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DataLayout data_layout, const ActivationLayerInfo &act_info, unsigned int n0, bool export_to_cl_image)
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{
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_dilation = dilation;
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_depth_multiplier = depth_multiplier;
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_data_type = data_type;
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_data_layout = data_layout;
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_act_info = act_info;
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_n0 = n0;
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_export_to_cl_image = export_to_cl_image;
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_in_place = in_place;
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_input_shape = TensorShape(width, height, channel, batch);
|
|
_weights_shape = TensorShape(kernel_size.width, kernel_size.height, channel * _depth_multiplier);
|
|
_biases_shape = TensorShape(_weights_shape.z());
|
|
|
|
if(padding_valid)
|
|
{
|
|
_conv_info = calculate_same_pad(_input_shape, _weights_shape, PadStrideInfo(stride.width, stride.height), DataLayout::NCHW, _dilation);
|
|
}
|
|
else
|
|
{
|
|
_conv_info = PadStrideInfo(stride.width, stride.height);
|
|
}
|
|
}
|
|
|
|
void configure_target()
|
|
{
|
|
#if defined(ARM_COMPUTE_OPENCL_ENABLED)
|
|
if(_export_to_cl_image)
|
|
{
|
|
_validate_output &= image2d_from_buffer_supported(CLKernelLibrary::get().get_device());
|
|
_validate_output &= (get_cl_image_pitch_alignment(CLKernelLibrary::get().get_device()) != 0);
|
|
}
|
|
#endif // ARM_COMPUTE_OPENCL_ENABLED
|
|
|
|
if(!_validate_output)
|
|
{
|
|
return;
|
|
}
|
|
|
|
TensorShape input_shape = _input_shape;
|
|
TensorShape weights_shape = _weights_shape;
|
|
|
|
if(_data_layout == DataLayout::NHWC)
|
|
{
|
|
permute(input_shape, PermutationVector(2U, 0U, 1U));
|
|
permute(weights_shape, PermutationVector(2U, 0U, 1U));
|
|
}
|
|
|
|
// Create tensors
|
|
_src = create_tensor<TensorType>(input_shape, _data_type, 1, QuantizationInfo(), _data_layout);
|
|
_weights = create_tensor<TensorType>(weights_shape, _data_type, 1, QuantizationInfo(), _data_layout);
|
|
_biases = create_tensor<TensorType>(_biases_shape, _data_type, 1, QuantizationInfo(), _data_layout);
|
|
TensorType *target_to_use = nullptr;
|
|
if(!_in_place)
|
|
{
|
|
_target = create_tensor<TensorType>(TensorShape(), _data_type, 1, QuantizationInfo(), _data_layout);
|
|
target_to_use = &_target;
|
|
}
|
|
|
|
DWCComputeKernelInfo dwc_info;
|
|
dwc_info.n0 = _n0;
|
|
dwc_info.m0 = _conv_info.stride().first == 1 && _dilation.x() == 1 ? 8 : 1;
|
|
dwc_info.export_input_to_cl_image = false;
|
|
dwc_info.export_weights_to_cl_image = _export_to_cl_image;
|
|
|
|
const ConvolutionInfo conv_kernel_info
|
|
{
|
|
_conv_info, _depth_multiplier, _act_info, _dilation
|
|
};
|
|
|
|
add_padding_x({ &_src, &_biases, &_target }, _data_layout);
|
|
add_padding_x({ &_weights }, _data_layout, _export_to_cl_image); // Don't add left padding if cl image will be used
|
|
|
|
// Create Depthwise Convolution configure function
|
|
_dwc.configure(&_src, &_weights, &_biases, target_to_use, dwc_info, conv_kernel_info);
|
|
|
|
ARM_COMPUTE_ASSERT(_src.info()->is_resizable());
|
|
ARM_COMPUTE_ASSERT(_weights.info()->is_resizable());
|
|
ARM_COMPUTE_ASSERT(_biases.info()->is_resizable());
|
|
ARM_COMPUTE_ASSERT(_target.info()->is_resizable());
|
|
}
|
|
|
|
void allocate_and_run_target()
|
|
{
|
|
if(!_validate_output)
|
|
{
|
|
return;
|
|
}
|
|
|
|
// Allocate tensors
|
|
_src.allocator()->allocate();
|
|
_weights.allocator()->allocate();
|
|
_biases.allocator()->allocate();
|
|
|
|
ARM_COMPUTE_ASSERT(!_src.info()->is_resizable());
|
|
ARM_COMPUTE_ASSERT(!_weights.info()->is_resizable());
|
|
ARM_COMPUTE_ASSERT(!_biases.info()->is_resizable());
|
|
if(!_in_place)
|
|
{
|
|
_target.allocator()->allocate();
|
|
ARM_COMPUTE_ASSERT(!_target.info()->is_resizable());
|
|
}
|
|
|
|
// Fill tensors
|
|
fill(AccessorType(_src), 0);
|
|
fill(AccessorType(_weights), 1);
|
|
fill(AccessorType(_biases), 2);
|
|
|
|
// Test Multi DataLayout graph cases, when the data layout changes after configure
|
|
_src.info()->set_data_layout(_data_layout == DataLayout::NCHW ? DataLayout::NHWC : DataLayout::NCHW);
|
|
if(!_in_place)
|
|
{
|
|
_target.info()->set_data_layout(_data_layout == DataLayout::NCHW ? DataLayout::NHWC : DataLayout::NCHW);
|
|
}
|
|
|
|
// Compute function
|
|
_dwc.run();
|
|
|
|
// Reinstating original data layout for the test suite to properly check the values
|
|
if(!_in_place)
|
|
{
|
|
_target.info()->set_data_layout(_data_layout);
|
|
}
|
|
}
|
|
|
|
void compute_reference()
|
|
{
|
|
if(!_validate_output)
|
|
{
|
|
return;
|
|
}
|
|
|
|
SimpleTensor<T> src{ _input_shape, _data_type };
|
|
SimpleTensor<T> weights{ _weights_shape, _data_type };
|
|
SimpleTensor<T> biases{ _biases_shape, _data_type };
|
|
|
|
fill(src, 0);
|
|
fill(weights, 1);
|
|
fill(biases, 2);
|
|
|
|
const ConvolutionInfo info{ _conv_info, _depth_multiplier, _act_info, _dilation };
|
|
const TensorShape dst_shape = compute_depthwise_convolution_shape(TensorInfo(_input_shape, 1, _data_type), TensorInfo(_weights_shape, 1, _data_type), info);
|
|
_reference = reference::activation_layer(reference::depthwise_convolution(src, weights, biases, dst_shape, _conv_info, _depth_multiplier, _dilation), _act_info);
|
|
}
|
|
|
|
protected:
|
|
template <typename U>
|
|
void fill(U &&tensor, int i)
|
|
{
|
|
switch(tensor.data_type())
|
|
{
|
|
case DataType::F32:
|
|
{
|
|
std::uniform_real_distribution<float> distribution(-1.0f, 1.0f);
|
|
library->fill(tensor, distribution, i);
|
|
break;
|
|
}
|
|
case DataType::F16:
|
|
{
|
|
arm_compute::utils::uniform_real_distribution_16bit<half> distribution{ -1.0f, 1.0f };
|
|
library->fill(tensor, distribution, i);
|
|
break;
|
|
}
|
|
default:
|
|
library->fill_tensor_uniform(tensor, i);
|
|
}
|
|
}
|
|
|
|
TensorType _target{};
|
|
SimpleTensor<T> _reference{};
|
|
|
|
TensorType _src{};
|
|
TensorType _weights{};
|
|
TensorType _biases{};
|
|
FunctionType _dwc{};
|
|
|
|
TensorShape _input_shape{};
|
|
TensorShape _weights_shape{};
|
|
TensorShape _biases_shape{};
|
|
DataType _data_type{};
|
|
DataLayout _data_layout{};
|
|
PadStrideInfo _conv_info{};
|
|
ActivationLayerInfo _act_info{};
|
|
Size2D _dilation{};
|
|
unsigned int _depth_multiplier{};
|
|
unsigned int _n0{};
|
|
bool _export_to_cl_image{};
|
|
bool _validate_output{ true };
|
|
bool _in_place{ false };
|
|
};
|
|
|
|
template <typename TensorType, typename AccessorType, typename FunctionType, typename T, bool mixed_layout = false, bool in_place = false>
|
|
class DepthwiseConvolutionLayerValidationQuantizedFixture : public DepthwiseConvolutionLayerValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>
|
|
{
|
|
public:
|
|
template <typename...>
|
|
void setup(TensorShape in_shape, Size2D kernel_size, PadStrideInfo pad_stride_info, Size2D dilation, unsigned int depth_multiplier, DataType data_type,
|
|
QuantizationInfo input_quantization_info, QuantizationInfo output_quantization_info, DataLayout data_layout, ActivationLayerInfo act_info)
|
|
{
|
|
DepthwiseConvolutionLayerValidationGenericFixture<TensorType, AccessorType, FunctionType, T, T>::setup(in_shape, kernel_size, pad_stride_info, dilation, depth_multiplier, data_type,
|
|
data_type, input_quantization_info, input_quantization_info, output_quantization_info,
|
|
data_layout, act_info, mixed_layout, in_place);
|
|
}
|
|
};
|
|
|
|
template <typename TensorType, typename AccessorType, typename FunctionType, typename T, typename TW, bool in_place = false>
|
|
class DepthwiseConvolutionLayerValidationQuantizedPerChannelFixture : public DepthwiseConvolutionLayerValidationGenericFixture<TensorType, AccessorType, FunctionType, T, TW>
|
|
{
|
|
public:
|
|
template <typename...>
|
|
void setup(TensorShape in_shape, Size2D kernel_size, PadStrideInfo pad_stride_info, Size2D dilation, unsigned int depth_multiplier, DataType input_data_type, DataType weights_data_type,
|
|
QuantizationInfo input_quantization_info, QuantizationInfo output_quantization_info, DataLayout data_layout, ActivationLayerInfo act_info)
|
|
{
|
|
const float out_scale = output_quantization_info.uniform().scale;
|
|
const float in_scale = input_quantization_info.uniform().scale;
|
|
|
|
std::vector<float> weights_scales{};
|
|
std::mt19937 gen(library->seed());
|
|
std::uniform_real_distribution<float> dis(0.01f, out_scale / in_scale);
|
|
for(size_t i = 0; i < in_shape.z() * depth_multiplier; ++i)
|
|
{
|
|
weights_scales.push_back(dis(gen));
|
|
}
|
|
|
|
DepthwiseConvolutionLayerValidationGenericFixture<TensorType, AccessorType, FunctionType, T, TW>::setup(in_shape, kernel_size, pad_stride_info, dilation, depth_multiplier,
|
|
input_data_type, weights_data_type,
|
|
input_quantization_info, QuantizationInfo(weights_scales), output_quantization_info,
|
|
data_layout, act_info, false, in_place);
|
|
}
|
|
};
|
|
} // namespace validation
|
|
} // namespace test
|
|
} // namespace arm_compute
|
|
#endif /* ARM_COMPUTE_TEST_DEPTHWISE_CONVOLUTION_FIXTURE */
|