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174 lines
2.1 KiB
174 lines
2.1 KiB
/*
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* (C) Copyright 2025 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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aliases {
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mmc0 = &emmc;
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mmc1 = &sdmmc0;
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};
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chosen {
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stdout-path = &uart0;
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u-boot,spl-boot-order = &sdmmc0, &spi_nand, &spi_nor, &emmc;
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};
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};
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&gpio0 {
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u-boot,dm-spl;
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status = "okay";
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};
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&gpio1 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&gpio2 {
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u-boot,dm-spl;
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status = "okay";
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};
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&gpio3 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&gpio4 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&grf {
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u-boot,dm-spl;
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status = "okay";
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};
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&ioc_grf {
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u-boot,dm-spl;
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status = "okay";
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};
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&cru {
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u-boot,dm-spl;
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status = "okay";
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};
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&crypto {
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u-boot,dm-spl;
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status = "okay";
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};
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&psci {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&uart0 {
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u-boot,dm-spl;
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status = "okay";
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};
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&hw_decompress {
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u-boot,dm-spl;
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status = "okay";
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};
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&rng {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&fspi0 {
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u-boot,dm-spl;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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spi_nand: flash@0 {
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u-boot,dm-spl;
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compatible = "spi-nand";
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reg = <0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <80000000>;
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};
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spi_nor: flash@1 {
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u-boot,dm-spl;
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compatible = "jedec,spi-nor";
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label = "sfc_nor";
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reg = <0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <80000000>;
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};
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};
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&saradc0 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&sdmmc0 {
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0_bus4_pins &sdmmc0_cmd_pins &sdmmc0_clk_pins &sdmmc0_detn_pins>;
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u-boot,dm-spl;
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status = "okay";
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};
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&emmc {
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bus-width = <8>;
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mmc-hs200-1_8v;
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u-boot,dm-spl;
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status = "okay";
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};
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&sdmmc0_pins {
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u-boot,dm-spl;
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};
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&sdmmc0_bus4_pins {
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u-boot,dm-spl;
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};
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&sdmmc0_cmd_pins {
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u-boot,dm-spl;
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};
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&sdmmc0_clk_pins {
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u-boot,dm-spl;
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};
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&sdmmc0_detn_pins {
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u-boot,dm-spl;
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};
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&pinctrl {
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u-boot,dm-spl;
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status = "okay";
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};
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&pcfg_pull_up {
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u-boot,dm-spl;
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};
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&pcfg_pull_none {
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u-boot,dm-spl;
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};
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&usb2phy {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&usb2phy_otg {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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