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299 lines
9.2 KiB
299 lines
9.2 KiB
//
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// Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved.
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// SPDX-License-Identifier: MIT
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//
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#include "BatchSpaceTestHelper.hpp"
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#include <armnn_delegate.hpp>
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#include <flatbuffers/flatbuffers.h>
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#include <schema_generated.h>
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#include <doctest/doctest.h>
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namespace armnnDelegate
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{
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// BatchToSpaceND Operator
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void BatchToSpaceNDFp32Test(std::vector<armnn::BackendId>& backends)
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{
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std::vector<int32_t> inputShape { 4, 1, 1, 1 };
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std::vector<int32_t> expectedOutputShape { 1, 2, 2, 1 };
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std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f };
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std::vector<float> expectedOutputValues { 1.0f, 2.0f, 3.0f, 4.0f };
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std::vector<unsigned int> blockShape({2, 2});
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std::vector<std::pair<unsigned int, unsigned int>> crops = {{0, 0}, {0, 0}};
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BatchSpaceTest<float>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND,
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::tflite::TensorType_FLOAT32,
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backends,
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inputShape,
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expectedOutputShape,
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inputValues,
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blockShape,
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crops,
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expectedOutputValues);
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}
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void BatchToSpaceNDFp32BatchOneTest(std::vector<armnn::BackendId>& backends)
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{
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std::vector<int32_t> inputShape { 1, 2, 2, 1 };
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std::vector<int32_t> expectedOutputShape { 1, 2, 2, 1 };
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std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f };
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std::vector<float> expectedOutputValues { 1.0f, 2.0f, 3.0f, 4.0f };
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std::vector<unsigned int> blockShape({1, 1});
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std::vector<std::pair<unsigned int, unsigned int>> crops = {{0, 0}, {0, 0}};
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BatchSpaceTest<float>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND,
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::tflite::TensorType_FLOAT32,
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backends,
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inputShape,
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expectedOutputShape,
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inputValues,
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blockShape,
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crops,
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expectedOutputValues);
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}
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void BatchToSpaceNDUint8Test(std::vector<armnn::BackendId>& backends)
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{
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std::vector<int32_t> inputShape { 4, 1, 1, 3 };
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std::vector<int32_t> expectedOutputShape { 1, 2, 2, 3 };
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std::vector<uint8_t> inputValues { 1, 2, 3, 4, 5, 6, 7 };
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std::vector<uint8_t> expectedOutputValues { 1, 2, 3, 4, 5, 6, 7 };
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std::vector<unsigned int> blockShape({2, 2});
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std::vector<std::pair<unsigned int, unsigned int>> crops = {{0, 0}, {0, 0}};
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BatchSpaceTest<uint8_t>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND,
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::tflite::TensorType_UINT8,
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backends,
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inputShape,
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expectedOutputShape,
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inputValues,
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blockShape,
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crops,
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expectedOutputValues);
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}
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// SpaceToBatchND Operator
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void SpaceToBatchNDFp32Test(std::vector<armnn::BackendId>& backends)
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{
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std::vector<int32_t> inputShape { 1, 2, 2, 1 };
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std::vector<int32_t> expectedOutputShape { 4, 1, 1, 1 };
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std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f };
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std::vector<float> expectedOutputValues { 1.0f, 2.0f, 3.0f, 4.0f };
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std::vector<unsigned int> blockShape({2, 2});
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std::vector<std::pair<unsigned int, unsigned int>> padding = {{0, 0}, {0, 0}};
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BatchSpaceTest<float>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND,
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::tflite::TensorType_FLOAT32,
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backends,
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inputShape,
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expectedOutputShape,
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inputValues,
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blockShape,
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padding,
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expectedOutputValues);
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}
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void SpaceToBatchNDFp32PaddingTest(std::vector<armnn::BackendId>& backends)
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{
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std::vector<int32_t> inputShape { 2, 2, 4, 1 };
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std::vector<int32_t> expectedOutputShape { 8, 1, 3, 1 };
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std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f,
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5.0f, 6.0f, 7.0f, 8.0f,
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9.0f, 10.0f, 11.0f, 12.0f,
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13.0f, 14.0f, 15.0f, 16.0f };
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std::vector<float> expectedOutputValues { 0.0f, 1.0f, 3.0f, 0.0f, 9.0f, 11.0f,
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0.0f, 2.0f, 4.0f, 0.0f, 10.0f, 12.0f,
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0.0f, 5.0f, 7.0f, 0.0f, 13.0f, 15.0f,
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0.0f, 6.0f, 8.0f, 0.0f, 14.0f, 16.0f };
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std::vector<unsigned int> blockShape({2, 2});
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std::vector<std::pair<unsigned int, unsigned int>> padding = {{0, 0}, {2, 0}};
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BatchSpaceTest<float>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND,
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::tflite::TensorType_FLOAT32,
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backends,
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inputShape,
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expectedOutputShape,
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inputValues,
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blockShape,
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padding,
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expectedOutputValues);
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}
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void SpaceToBatchNDUint8Test(std::vector<armnn::BackendId>& backends)
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{
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std::vector<int32_t> inputShape { 1, 2, 2, 3 };
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std::vector<int32_t> expectedOutputShape { 4, 1, 1, 3 };
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std::vector<uint8_t> inputValues { 1, 2, 3, 4, 5, 6, 7 };
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std::vector<uint8_t> expectedOutputValues { 1, 2, 3, 4, 5, 6, 7 };
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std::vector<unsigned int> blockShape({2, 2});
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std::vector<std::pair<unsigned int, unsigned int>> padding = {{0, 0}, {0, 0}};
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BatchSpaceTest<uint8_t>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND,
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::tflite::TensorType_UINT8,
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backends,
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inputShape,
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expectedOutputShape,
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inputValues,
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blockShape,
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padding,
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expectedOutputValues);
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}
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// BatchToSpaceND Tests
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TEST_SUITE("BatchToSpaceND_CpuAccTests")
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{
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TEST_CASE ("BatchToSpaceND_Fp32_CpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
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BatchToSpaceNDFp32Test(backends);
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}
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TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_CpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
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BatchToSpaceNDFp32BatchOneTest(backends);
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}
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TEST_CASE ("BatchToSpaceND_Uint8_CpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
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BatchToSpaceNDUint8Test(backends);
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}
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}
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TEST_SUITE("BatchToSpaceND_GpuAccTests")
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{
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TEST_CASE ("BatchToSpaceND_Fp32_GpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
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BatchToSpaceNDFp32Test(backends);
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}
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TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_GpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
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BatchToSpaceNDFp32BatchOneTest(backends);
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}
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TEST_CASE ("BatchToSpaceND_Uint8_GpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
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BatchToSpaceNDUint8Test(backends);
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}
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}
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TEST_SUITE("BatchToSpaceND_CpuRefTests")
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{
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TEST_CASE ("BatchToSpaceND_Fp32_CpuRef_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
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BatchToSpaceNDFp32Test(backends);
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}
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TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_CpuRef_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
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BatchToSpaceNDFp32BatchOneTest(backends);
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}
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TEST_CASE ("BatchToSpaceND_Uint8_CpuRef_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
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BatchToSpaceNDUint8Test(backends);
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}
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}
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// SpaceToBatchND Tests
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TEST_SUITE("SpaceToBatchND_CpuAccTests")
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{
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TEST_CASE ("SpaceToBatchND_Fp32_CpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
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SpaceToBatchNDFp32Test(backends);
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}
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TEST_CASE ("SpaceToBatchND_Fp32_Padding_CpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
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SpaceToBatchNDFp32PaddingTest(backends);
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}
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TEST_CASE ("SpaceToBatchND_Uint8_CpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
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SpaceToBatchNDUint8Test(backends);
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}
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}
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TEST_SUITE("SpaceToBatchND_GpuAccTests")
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{
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TEST_CASE ("SpaceToBatchND_Fp32_GpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
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SpaceToBatchNDFp32Test(backends);
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}
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TEST_CASE ("SpaceToBatchND_Fp32_Padding_GpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
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SpaceToBatchNDFp32PaddingTest(backends);
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}
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TEST_CASE ("SpaceToBatchND_Uint8_GpuAcc_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
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SpaceToBatchNDUint8Test(backends);
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}
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}
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TEST_SUITE("SpaceToBatchND_CpuRefTests")
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{
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TEST_CASE ("SpaceToBatchND_Fp32_CpuRef_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
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SpaceToBatchNDFp32Test(backends);
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}
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TEST_CASE ("SpaceToBatchND_Fp32_Padding_CpuRef_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
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SpaceToBatchNDFp32PaddingTest(backends);
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}
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TEST_CASE ("SpaceToBatchND_Uint8_CpuRef_Test")
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{
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std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
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SpaceToBatchNDUint8Test(backends);
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}
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}
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} // namespace armnnDelegate
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